Michael B. Healy

Michael B. Healy, Sung Kyu Lim: Distributed TSV Topology for 3-D Power-Supply Networks. IEEE Trans. VLSI Syst. 20(11): 2066-2079 (2012)

Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger: Power management of multi-core chips: Challenges and pitfalls. DATE 2012: 977-982

Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim: 3D-MAPS: 3D Massively parallel processor with stacked memory. ISSCC 2012: 188-190

Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim: Integrated microarchitectural floorplanning and run-time controller for inductive noise mitigation. ACM Trans. Design Autom. Electr. Syst. 16(4): 46 (2011)

Michael B. Healy, Sung Kyu Lim: A novel TSV topology for many-tier 3D power-delivery networks. DATE 2011: 261-264

Michael B. Healy, Sung Kyu Lim: Power-supply-network design in 3D integrated systems. ISQED 2011: 223-228

Jeonghee Shin, John A. Darringer, Guojie Luo, Merav Aharoni, Alexey Lvov, Gi-Joon Nam, Michael B. Healy: Floorplanning challenges in early chip planning. SoCC 2011: 388-393

Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim: Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory. CICC 2010: 1-4

Michael B. Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, Sung Kyu Lim: Thermal optimization in multi-granularity multi-core floorplanning. ASP-DAC 2009: 43-48

Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim: A unified methodology for power supply noise reduction in modern microarchitecture design. ASP-DAC 2008: 611-616

Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh: Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 38-52 (2007)

Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee: Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling. ASP-DAC 2007: 786-791

Mongkol Ekpanyapong, Michael B. Healy, Sung Kyu Lim: Profile-Driven Instruction Mapping for Dataflow Architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 3017-3025 (2006)

Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh: Microarchitectural floorplanning under performance and thermal tradeoff. DATE 2006: 1288-1293

Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee: A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design. MICRO 2006: 3-14

Mongkol Ekpanyapong, Michael B. Healy, Sung Kyu Lim: Placement for configurable dataflow architecture. ASP-DAC 2005: 1127-1130

Michael B. Healy, Mongkol Ekpanyapong, Sung Kyu Lim: MILP-based Placement and Routing for Dataflow Architecture. FPL 2005: 71-76