Andreas Herkersdorf

Christian Herber, Andre Richter, Holm Rauchfuss, Andreas Herkersdorf: Self-virtualized CAN Controller for Multi-core Processors in Real-Time Applications. ARCS 2013: 244-255

Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf: HW-OSQM: Reducing the Impact of Event Signaling by Hardware-Based Operating System Queue Manipulation. ARCS 2013: 280-291

Stefan Wallentowitz, Philipp Wagner, Michael Tempelmeier, Thomas Wild, Andreas Herkersdorf: Open Tiled Manycore System-on-Chip. CoRR abs/1304.5081 (2013)

Jürgen Teich, Wolfgang Schröder-Preikschat, Andreas Herkersdorf: Invasive Computing - Common Terms and Granularity of Invasion. CoRR abs/1304.6067 (2013)

Andreas Herkersdorf, Hans-Ulrich Michel, Holm Rauchfuss, Thomas Wild: Multicore Enablement for Automotive Cyber Physical Systems. it - Information Technology 54(6): 280-287 (2012)

Andreas Lankes, Thomas Wild, Stefan Wallentowitz, Andreas Herkersdorf: Benefits of selective packet discard in networks-on-chip. TACO 9(2): 12 (2012)

Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf: Enhanced Reliability in Tiled Manycore Architectures through Transparent Task Relocation. ARCS Workshops 2012: 263-274

Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe: Invasive manycore architectures. ASP-DAC 2012: 193-200

Sebastian Drössler, Michael Eichhorn, S. Holzknecht, Bernd Müller-Rathgeber, Holm Rauchfuss, Michael Zwick, Erwin M. Biebl, Klaus Diepold, Jörg Eberspächer, Andreas Herkersdorf, Walter Stechele, Eckehard G. Steinbach, R. Freymann, Karl-Ernst Steinberg, Hans-Ulrich Michel: A Real-Time Capable Virtualized Information and Communication Technology Infrastructure for Automotive Systems. Advances in Real-Time Systems 2012: 275-306

Rainer Leupers, Grant Martin, Roman Plyaskin, Andreas Herkersdorf, Frank Schirrmeister, Tim Kogel, Martin Vaupel: Virtual platforms: Breaking new grounds. DATE 2012: 685-690

Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf: A low-overhead monitoring ring interconnect for MPSoC parameter optimization. DDECS 2012: 46-49

Felix Miller, Thomas Wild, Andreas Herkersdorf: TSV-virtualization for Multi-protocol-Interconnect in 3D-ICs. DSD 2012: 374-381

Matthias Ihmig, Michael Feilen, Andreas Herkersdorf: Analytical Design Space Exploration Based on Statistically Refined Runtime and Logic Estimation for Software Defined Radios. DSD 2012: 445-452

Jörg Henkel, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel, Norbert Wehn: Dependable embedded systems: The German research foundation DFG priority program SPP 1500. European Test Symposium 2012: 1

Michael Gerndt, Frank Hannig, Andreas Herkersdorf, Andreas Hollmann, Marcel Meyer, Sascha Roloff, Josef Weidendorfer, Thomas Wild, Aurang Zaib: An integrated simulation framework for invasive computing. FDL 2012: 209-216

Stefan Wallentowitz, Andreas Lankes, Aurang Zaib, Thomas Wild, Andreas Herkersdorf: A framework for Open Tiled Manycore System-On-Chip. FPL 2012: 535-538

Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker: Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. IPDPS Workshops 2012: 234-241

Andreas Herkersdorf: Multicore enablement for Cyber Physical Systems. ICSAMOS 2012: 345

Gero Mühl, Jan Richling, Andreas Herkersdorf (Eds.): ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany. LNI 200, GI 2012, isbn 978-3-88579-294-9

Andreas Herkersdorf, Kay Römer, Uwe Brinkschulte (Eds.): Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings. Lecture Notes in Computer Science 7179, Springer 2012, isbn 978-3-642-28292-8

Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf: Advanced Packet Segmentation and Buffering Algorithms in Network Processors. T. HiPEAC 4: 334-353 (2011)

Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel: Combining Software and Hardware LCS for Lightweight On-chip Learning. Organic Computing 2011: 253-265

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf: Autonomic System on Chip Platform. Organic Computing 2011: 413-425

Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf: Applying ASoC to Multi-core Applications for Workload Management. Organic Computing 2011: 461-472

Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld: Hardware Support for Efficient Resource Utilization in Manycore Processor Systems. Multiprocessor System-on-Chip 2011: 57-87

Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting: Invasive Computing: An Overview. Multiprocessor System-on-Chip 2011: 241-268

Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich: Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78

Zhonglei Wang, Kun Lu, Andreas Herkersdorf: An approach to improve accuracy of source-level TLMs of embedded software. DATE 2011: 216-221

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf: An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors. DDECS 2011: 225-230

Johannes Zeppenfeld, Andreas Herkersdorf: Applying autonomic principles for workload management in multi-core systems on chip. ICAC 2011: 3-10

Thomas Ebi, Holm Rauchfuss, Andreas Herkersdorf, Jörg Henkel: Agent-Based Thermal Management Using Real-Time I/O Communication Relocation for 3D Many-Cores. PATMOS 2011: 112-121

Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf: Accelerating collective communication in message passing on manycore System-on-Chip. ICSAMOS 2011: 9-16

Roman Plyaskin, Andreas Herkersdorf: Context-aware compiled simulation of out-of-order processor behavior based on atomic traces. VLSI-SoC 2011: 386-391

Kirstie L. Bellman, Andreas Herkersdorf, Michael G. Hinchey: Organic Computing - Design of Self-Organizing Systems (Dagstuhl Seminar 11181). Dagstuhl Reports 1(5): 1-28 (2011)

Zhonglei Wang, Andreas Herkersdorf: Software performance simulation strategies for high-level embedded system design. Perform. Eval. 67(8): 717-739 (2010)

Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: FlexPath NP - Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. Dynamically Reconfigurable Systems 2010: 355-374

Kimon Karras, Thomas Wild, Andreas Herkersdorf: A folded pipeline network processor architecture for 100 Gbit/s networks. ANCS 2010: 2

Johannes Zeppenfeld, Andreas Herkersdorf: Autonomic Workload Management for Multi-core Processor Systems. ARCS 2010: 49-60

Roman Plyaskin, Andreas Herkersdorf: A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces. ARCS 2010: 199-210

Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich: A rapid prototyping system for error-resilient multi-processor systems-on-chip. DATE 2010: 375-380

Robert Hartl, Andreas J. Rohatschek, Walter Stechele, Andreas Herkersdorf: Architectural Vulnerability Factor Estimation with Backwards Analysis. DSD 2010: 605-612

Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: An Application-Aware Load Balancing Strategy for Network Processors. HiPEAC 2010: 156-170

Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel: Combining Software and Hardware LCS for Lightweight On-Chip Learning. DIPES/BICC 2010: 278-289

Andreas Lankes, Thomas Wild, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig: Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks. NOCS 2010: 17-24

Roman Plyaskin, Alejandro Masrur, Martin Geier, Samarjit Chakraborty, Andreas Herkersdorf: High-level timing analysis of concurrent applications on MPSoC platforms using memory-aware trace-driven simulations. VLSI-SoC 2010: 229-234

Zhonglei Wang, Andreas Herkersdorf, Wolfgang Haberl, Martin Wechs: SysCOLA: a framework for co-development of automotive software and system platform. DAC 2009: 37-42

Zhonglei Wang, Andreas Herkersdorf: An efficient approach for system-level timing simulation of compiler-optimized embedded software. DAC 2009: 220-225

Shadi Traboulsi, Michael Meitinger, Rainer Ohlendorf, Andreas Herkersdorf: An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs. DSD 2009: 11-18

Andreas Lankes, Thomas Wild, Andreas Herkersdorf: Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources. DSD 2009: 255-262

Andreas Lankes, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig: NoC topology exploration for mobile multimedia applications. ICECS 2009: 707-710

Zhonglei Wang, Andreas Herkersdorf: Flow Analysis on Intermediate Source Code for WCET Estimation of Compiler-Optimized Programs. RTCSA 2009: 22-27

Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Trans. VLSI Syst. 16(10): 1335-1345 (2008)

Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Hardware Packet Re-Sequencer Unit for Network Processors. ARCS 2008: 85-97

Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf: Buffer allocation for advanced packet segmentation in Network Processors. ASAP 2008: 221-226

Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer: Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE 2008

Zhonglei Wang, Andreas Herkersdorf, Stefano Merenda, Michael Tautschnig: A Model Driven Development Approach for Implementing Reactive Systems in Hardware. FDL 2008: 197-202

Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker: Fine grain reconfigurable architectures. FPL 2008: 348

Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: Network processors. FPL 2008: 352

Andreas Herkersdorf, Walter Stechele, Christian Müller-Schloer, Hartmut Schmeck: Workshop "Adaptive and Organic Systems". GI Jahrestagung (2) 2008: 731-732

Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) 2008: 771-778

Zhonglei Wang, Wolfgang Haberl, Andreas Herkersdorf, Martin Wechs: A Simulation Approach for Performance Validation during Embedded Systems Design. ISoLA 2008: 385-399

Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf: Improving memory subsystem performance in network processors with smart packet segmentation. ICSAMOS 2008: 210-217

Zhonglei Wang, Antonio Sanchez, Andreas Herkersdorf: SciSim: a software performance estimation framework using source code instrumentation. WOSP 2008: 33-42

Christopher Claus, Walter Stechele, Andreas Herkersdorf: Autovision - A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision - Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme). it - Information Technology 49(3): 181- (2007)

Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications. Journal of Systems Architecture 53(10): 703-718 (2007)

Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. ISVLSI 2007: 259-264

Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild: Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dynamically Reconfigurable Architectures 2006

Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf: Performance evaluation for system-on-chip architectures using trace-based transaction level simulation. DATE 2006: 248-253

Andreas Herkersdorf, Walter Stechele: AutoVision: flexible processor architecture for video-assisted driving. DATE 2006: 556

Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) 2006: 177-

Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC 2006: 107-113

Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. ICSAMOS 2006: 152-159

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341

Thomas Wild, Andreas Herkersdorf, Gyoo-Yeong Lee: TAPES - Trace-based architecture performance evaluation with SystemC. Design Autom. for Emb. Sys. 10(2-3): 157-179 (2005)

David E. Taylor, Andreas Herkersdorf, Andreas C. Döring, Gero Dittmann: Robust header compression (ROHC) in next-generation network processors. IEEE/ACM Trans. Netw. 13(4): 755-768 (2005)

Faisal Suleman, Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf: Adaptable DSP Functions for Dynamically Reconfigurable Communication Systems. ARCS Workshops 2005: 19-26

Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomous SoC. ARCS Workshops 2005: 101-108

Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild: FlexPath NP: a network processor concept with application-driven flexible processing paths. CODES+ISSS 2005: 279-284

Paul Zuber, Armin Windschiegl, Raúl Medina Beltán de Otálora, Walter Stechele, Andreas Herkersdorf: Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization. DATE 2005: 986-987

Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomic SoC. ICAC 2005: 391-392

Walter Stechele, Stephan Herrmann, Andreas Herkersdorf: Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing. ARCS Workshops 2004: 225-234

Carsten Albrecht, Rainer Hagenau, Erik Maehle, Andreas C. Döring, Andreas Herkersdorf: A Comparison of Parallel Programming Models of Network Processors. ARCS Workshops 2004: 390-399

Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf: Buffer Schemes for Runtime Reconfiguration of Function Variants in Communication Systems. FCCM 2004: 312-315

Andreas Herkersdorf, Wolfgang Rosenstiel: Towards a Framework and a Design Methodology for Autonomic Integrated Systems. GI Jahrestagung (2) 2004: 610-615

Maria Gabrani, Gero Dittmann, Andreas C. Döring, Andreas Herkersdorf, Patricia Sagmeister, Jan van Lunteren: Design methodology for a modular service-driven network processor architecture. Computer Networks 41(5): 623-640 (2003)

Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister: Performance evaluation of network processor architectures: combining simulation with analytical estimation. Computer Networks 41(5): 641-665 (2003)

James R. Allen Jr., Brian M. Bass, Claude Basso, Richard H. Boivie, Jean Calvignac, Gordon T. Davis, Laurent Freléchoux, Marco Heddes, Andreas Herkersdorf, Andreas Kind, Joe F. Logan, Mohammad Peyravian, Mark A. Rinaldi, Ravi K. Sabhikhi, Michael S. Siegel, Marcel Waldvogel: IBM PowerNP network processor: Hardware, software, and applications. IBM Journal of Research and Development 47(2-3): 177-194 (2003)

John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin: Early analysis tools for system-on-a-chip design. IBM Journal of Research and Development 46(6): 691-708 (2002)

Rolf Clauberg, Peter Buchmann, Andreas Herkersdorf, David J. Webb: Design Methodology for a Large Communication Chip. IEEE Design & Test of Computers 17(3): 86-94 (2000)

Andreas Herkersdorf, L. Heusler, Erik Maehle: Route Discovery for Multistage Fabrics in ATM Switching Nodes. Perform. Eval. 22(3): 221-238 (1995)

Andreas Herkersdorf, L. Heusler, Erik Maehle: Route Discovery in Multistage Switch Fabrics. Data Communication Networks and their Performance 1993: 103-118

Willibald A. Doeringer, Douglas Dykeman, Antonius P. J. Engbersen, Roch Guérin, Andreas Herkersdorf, L. Heusler: Fast Connection Establishment in Large-Scale Networks. INFOCOM 1993: 489-496