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Tetsuya Higuchi
2010 – today
- 2011
[c64]Kenji Watanabe, Takumi Kobayashi, Katsuyuki Koike, Tetsuya Higuchi, Tohru Natsume, Nobuyuki Otsu: Detection of peptide ion peaks in mass spectra by using weighted auto-correlation. ICASSP 2011: 621-624
[c63]Jiaxing Ye, Takumi Kobayashi, Tetsuya Higuchi, Nobuyuki Otsu: Adaptive Abnormality Detection on ECG Signal by Utilizing FLAC Features. LION 2011: 218-225- 2010
[c62]Jiaxing Ye, Takumi Kobayashi, Tetsuya Higuchi: Audio-based sports highlight detection by fourier local auto-correlations. INTERSPEECH 2010: 2198-2201
2000 – 2009
- 2009
[c61]Takumi Kobayashi, Tetsuya Higuchi, Tsuneharu Miyajima, Nobuyuki Otsu: Recognition of Dynamic Texture Patterns Using CHLAC Features. BLISS 2009: 58-60
[c60]Hirokazu Nosato, Hidenori Sakanashi, Masahiro Murakawa, Tetsuya Higuchi, Nobuyuki Otsu, Kensuke Terai, Nobuyuki Hiruta, Noriaki Kameda: Histopathological Diagnostic Support Technology Using Higher-Order Local Autocorrelation Features. BLISS 2009: 61-65
[c59]Fumio Sakabe, Masahiro Murakawa, Takumi Kobayashi, Tetsuya Higuchi, Nobuyuki Otsu: Anomalousness Detection for Surgery Videos Using CHLAC Feature. BLISS 2009: 66-68
[e6]Adrian Stoica, Tughrul Arslan, Ahmet T. Erdogan, Tetsuya Higuchi, Ahmed Bouridane, Ahmed O. El-Rayis (Eds.): 2009 Symposium on Bio-inspired Learning and Intelligent Systems for Security, BLISS 2009, Edingburgh, United Kingdom, August 20-21 2009. IEEE Computer Society 2009, ISBN 978-0-7695-3754-2- 2008
[c58]Hirotaka Nosato, Yukari Ishida, Tatsumi Furuya, Eiichi Takahashi, Masahiro Murakawa, Isamu Kajitani, Tetsuya Higuchi: World-Wide Accessible LDPC Encoder/Decoder Generator Using Web-Based GUI and API. CIMCA/IAWTIC/ISE 2008: 627-632
[c57]Tatsuya Susa, Masahiro Murakawa, Eiichi Takahashi, Tatsumi Furuya, Tetsuya Higuchi: Post-Fabrication Clock-Timing Adjustment for Digital LSIs Ensuring Operational Timing Margins. HIS 2008: 907-910
[c56]Yukari Ishida, Hirotaka Nosato, Eiichi Takahashi, Masahiro Murakawa, Isamu Kajitani, Tatsumi Furuya, Tetsuya Higuchi: Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation. ICES 2008: 237-248
[e5]Adrian Stoica, Tughrul Arslan, Daniel Howard, Tetsuya Higuchi, Ahmed O. El-Rayis (Eds.): 2008 ECSIS Symposium on Bio-inspired, Learning, and Intelligent Systems for Security, BLISS 2008, Edinburgh, UK, 4-6 August 2008. IEEE Computer Society 2008, ISBN 978-0-7695-3265-3- 2007
[c55]Tetsuaki Matsunawa, Hirokazu Nosato, Hidenori Sakanashi, Masahiro Murakawa, Eiichi Takahashi, Tsuneo Terasawa, Toshihiko Tanaka, Osamu Suga, Tetsuya Higuchi: Adaptive Optical Proximity Correction Using an Optimization Method. CIT 2007: 853-860
[c54]Yosuke Iijima, Masahiro Murakawa, Yuji Kasai, Eiichi Takahashi, Tetsuya Higuchi: Proposal of transmission line modeling using multi-objective optimization techniques. IEEE Congress on Evolutionary Computation 2007: 2094-2100
[e4]Tughrul Arslan, Adrian Stoica, Martin Suess, Didier Keymeulen, Tetsuya Higuchi, Ricardo Salem Zebulum, Ahmet T. Erdogan (Eds.): Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom. IEEE Computer Society 2007- 2006
[j14]Yuji Kasai, Kiyoshi Miyashita, Hidenori Sakanashi, Eiichi Takahashi, Masaya Iwata, Masahiro Murakawa, Kiyoshi Watanabe, Yukihiro Ueda, Kaoru Takasuka, Tetsuya Higuchi: An Image Rejection Mixer with AI-Based Improved Performance for WCDMA Applications. IEICE Transactions 89-C(6): 717-724 (2006)
[c53]Hirokazu Nosato, Masahiro Murakawa, Tetsuya Higuchi: Automatic Alignment of Multiple Optical Components Using Genetic Algorithm. AHS 2006: 67-73
[e3]Adrian Stoica, Tughrul Arslan, Martin Suess, Senay Yalçin, Didier Keymeulen, Tetsuya Higuchi, Ricardo Salem Zebulum, Nizamettin Aydin (Eds.): First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 15-18 June 2006, Istanbul, Turkey. IEEE Computer Society 2006, ISBN 0-7695-2614-4- 2005
[c52]Masahiro Murakawa, Mitiko Miura-Mattausch, Tetsuya Higuchi: Towards automatic parameter extraction for surface-potential-based MOSFET models with the genetic algorithm. ASP-DAC 2005: 204-207
[c51]Yuji Kasai, Eiichi Takahashi, Masaya Iwata, Yosuke Iijima, Hidenori Sakanashi, Masahiro Murakawa, Tetsuya Higuchi: Adaptive Waveform Control in a Data Transceiver for Multi-speed IEEE1394 and USB Communication. ICES 2005: 198-204- 2004
[j13]Masahiro Murakawa, Yoshihiro Noda, Tetsuya Higuchi: An automatic fiber alignment system using genetic algorithms. Systems and Computers in Japan 35(11): 80-90 (2004)
[c50]Masahiro Murakawa, Eiichi Takahashi, Tatsuya Susa, Tetsuya Higuchi: Post-fabrication clock timing adjustment for digital LSIs with genetic algorithms ensuring timing margins. SMC (4) 2004: 3670-3674
[c49]Hirokazu Nosato, Taro Itatani, Masahiro Murakawa, Tetsuya Higuchi, Hitoshi Noguchi: Automatic wave-front correction of a femtosecond laser using genetic algorithm. SMC (4) 2004: 3675-3679- 2003
[c48]Masahiro Murakawa, Hirokazu Nosato, Tetsuya Higuchi: Automatic Optical Fiber Alignment System Using Genetic Algorithms. Artificial Evolution 2003: 129-140
[c47]Eiichi Takahashi, Masahiro Murakawa, Yuji Kasai, Tetsuya Higuchi: Power Dissipation Reductions with Genetic Algorithms. Evolvable Hardware 2003: 111-116- 2001
[c46]Masaya Iwata, Isamu Kajitani, Yong Liu, Nobuki Kajihara, Tetsuya Higuchi: Implementation of a Gate-Level Evolvable Hardware Chip. ICES 2001: 38-49
[c45]Hidenori Sakanashi, Masaya Iwata, Tetsuya Higuchi: A Lossless Compression Method for Halftone Images Using Evolvable Hardware. ICES 2001: 314-326
[c44]Hirokazu Nosato, Yuji Kasai, Taro Itatani, Masahiro Murakawa, Tatsumi Furuya, Tetsuya Higuchi: Evolvable Optical Systems and Their Applications. ICES 2001: 327-340
[e2]Yong Liu, Kiyoshi Tanaka, Masaya Iwata, Tetsuya Higuchi, Moritoshi Yasunaga (Eds.): Evolvable Systems: From Biology to Hardware, 4th International Conference, ICES 2001 Tokyo, Japan, October 3-5, 2001, Proceedings. Lecture Notes in Computer Science 2210, Springer 2001, ISBN 3-540-42671-X- 2000
[j12]Masaya Iwata, Isamu Kajitani, Masahiro Murakawa, Yuji Hirao, Hitoshi Iba, Tetsuya Higuchi: Pattern recognition system using evolvable hardware. Systems and Computers in Japan 31(4): 1-11 (2000)
[j11]Yong Liu, Xin Yao, Tetsuya Higuchi: Evolutionary ensembles with negative correlation learning. IEEE Trans. Evolutionary Computation 4(4): 380-387 (2000)
[c43]Neil Marston, Eiichi Takahashi, Masahiro Murakawa, Yuji Kasai, Tetsuya Higuchi, Toshio Adachi, Kaoru Takasuka: An Evolutionary Approach to GHz Digital Systems. Evolvable Hardware 2000: 125-132
[c42]Yasuo Takehisa, Hidenori Sakanashi, Tetsuya Higuchi: Adaptive Wavelet Transform for Lossless Compression using Genetic Algorithm. GECCO 2000: 259-266
[c41]Yuji Kasai, Hidenori Sakanashi, Masahiro Murakawa, Shogo Kiryu, Neil Marston, Tetsuya Higuchi: Initial Evaluation of an Evolvable Microwave Circuit. ICES 2000: 103-112
[c40]Yong Liu, Masaya Iwata, Tetsuya Higuchi, Didier Keymeulen: An Integrated On-Line Learning System for Evolving Programmable Logic Array Controllers. PPSN 2000: 589-598
1990 – 1999
- 1999
[j10]Tetsuya Higuchi, Nobuki Kajihara: Evolvable Hardware Chips for Industrial Applications. Commun. ACM 42(4): 60-66 (1999)
[j9]Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Xin Yao, Nobuki Kajihara, Masaya Iwata, Tetsuya Higuchi: The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing. IEEE Trans. Computers 48(6): 628-639 (1999)
[j8]Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu: Real-world applications of analog and digital evolvable hardware . IEEE Trans. Evolutionary Computation 3(3): 220-235 (1999)
[j7]Xin Yao, Tetsuya Higuchi: Promises and challenges of evolvable hardware. IEEE Transactions on Systems, Man, and Cybernetics, Part C 29(1): 87-97 (1999)
[c39]Isamu Kajitani, Tsutomu Hoshino, Nobuki Kajihara, Masaya Iwata, Tetsuya Higuchi: An Evolvable Hardware Chip and Its Application as a Multi-Function Prosthetic Hand Controller. AAAI/IAAI 1999: 182-187- 1998
[j6]Didier Keymeulen, Masaya Iwata, Yasuo Kuniyoshi, Tetsuya Higuchi: Online Evolution for a Self-Adapting Robotic Navigation System Using Evolvable Hardware. Artificial Life 4(4): 359-393 (1998)
[j5]Didier Keymeulen, Masaya Iwata, Kenji Konaka, Yasuo Kuniyoshi, Tetsuya Higuchi: Evolvable Hardware: A Robot Navigation System Testbed. New Generation Comput. 16(2): 97-122 (1998)
[c38]Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Tetsuya Higuchi: Evolvable Hardware Chip for High Precision Printer Image Compression. AAAI/IAAI 1998: 486-491
[c37]Mehrdad Salami, Hidenori Sakanashi, Masaharu Tanaka, Masaya Iwata, Takio Kurita, Tetsuya Higuchi: On-Line Compression of High Precision Printer Images by Evolvable Hardware. Data Compression Conference 1998: 219-228
[c36]Didier Keymeulen, Masaya Iwata, Kenji Konaka, Ryouhei Suzuki, Yasuo Kuniyoshi, Tetsuya Higuchi: Off-Line Model-Free and On-Line Model-Based Evolution for Tracking Navigation Using Evolvable Hardware. EvoRobots 1998: 211-226
[c35]Isamu Kajitani, Tsutomu Hoshino, Daisuke Nishikawa, Hiroshi Yokoi, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Masaya Iwata, Didier Keymeulen, Tetsuya Higuchi: A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. ICES 1998: 1-12
[c34]Masaharu Tanaka, Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Takio Kurita, Tetsuya Higuchi: Data Compression for Digital Color Electrophotographic Printer with Evolvable Hardware. ICES 1998: 106-114
[c33]Masahiro Murakawa, Shuji Yoshizawa, Toshio Adachi, Shiro Suzuki, Kaoru Takasuka, Masaya Iwata, Tetsuya Higuchi: Analogue EHW Chip for Intermediate Frequency Filters. ICES 1998: 134-143
[c32]Masahiro Murakawa, Kazuyuki Hiraoka, Tetsuya Higuchi, Tatsumi Furuya, Shuji Yoshizawa: Adaptive Blind Equalization Using Bottleneck Networks Implemented by Evolvable Hardware. ICONIP 1998: 89-92- 1997
[j4]Ian Frank, Bernard Manderick, Tetsuya Higuchi: Recent Advances in Evolvable Systems - ICES 96 (International Conference on Evolvable Systems). Evolutionary Computation 5(1): 105-114 (1997)
[c31]Didier Keymeulen, Kenji Konaka, Masaya Iwata, Yasuo Kuniyoshi, Tetsuya Higuchi: Robot Learning Using Gate-Level Evolvable Hardware. EWLR 1997: 173-
[c30]Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Tetsuya Higuchi: On-line Adaptation of Neural Networks with Evolvable Hardware. ICGA 1997: 792-800
[c29]Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Tetsuya Higuchi: Evolvable Hardware for Generalized Neural Networks. IJCAI 1997: 1146-1155- 1996
[j3]Toshio Tanaka, Tetsuya Higuchi, Tatsumi Furuya: Cost coefficient control method for solving optimization problems on hopfield-type neural networks. Systems and Computers in Japan 27(1): 27-39 (1996)
[c28]Isamu Kajitani, Tsutomu Hoshino, Masaya Iwata, Tetsuya Higuchi: Variable Length Chromosome GA for Evolvable Hardware. International Conference on Evolutionary Computation 1996: 443-447
[c27]Hidenori Sakanashi, Tetsuya Higuchi, Hitoshi Iba, Yukinori Kakazu: An Approach for Genetic Synthesizer of Binary Decision Diagram. International Conference on Evolutionary Computation 1996: 559-564
[c26]
[c25]Mehrdad Salami, Masahiro Murakawa, Tetsuya Higuchi: Data Compression Based on Evolvable Hardware. ICES 1996: 169-179
[c24]Weixin Liu, Masahiro Murakawa, Tetsuya Higuchi: ATM Cell Scheduling by Function Level Evolvable Hardware. ICES 1996: 180-192
[c23]Didier Keymeulen, Marc Durantez, Kenji Konaka, Yasuo Kuniyoshi, Tetsuya Higuchi: An Evolutionary Robot Navigation System Using a Gate-Level Evolvable Hardware. ICES 1996: 195-209
[c22]
[c21]Hitoshi Iba, Masaya Iwata, Tetsuya Higuchi: Machine Learning Approach to Gate-Level Evolvable Hardware. ICES 1996: 327-343
[c20]Masahiro Murakawa, Shuji Yoshizawa, Tetsuya Higuchi: Adaptive Equalization of Digital Communication Channels Using Evolvable Hardware. ICES 1996: 379-389
[c19]Hidenori Sakanashi, Tetsuya Higuchi, Hitoshi Iba, Yukinori Kakazu: Evolution of Binary Decision Diagrams for Digital Circuit Design Using Genetic Programming. ICES 1996: 470-481
[c18]Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Tatsumi Furuya, Masaya Iwata, Tetsuya Higuchi: Hardware Evolution at Function Level. PPSN 1996: 62-71
[c17]Masaya Iwata, Isamu Kajitani, Hitoshi Yamada, Hitoshi Iba, Tetsuya Higuchi: A Pattern Recognition System Using Evolvable Hardware. PPSN 1996: 761-770
[e1]Tetsuya Higuchi, Masaya Iwata, Weixin Liu (Eds.): Evolvable Systems: From Biology to Hardware, First International Conference, ICES 96, Tsukuba, Japan, October 7-8, 1996, Proceedings. Lecture Notes in Computer Science 1259, Springer 1996, ISBN 3-540-63173-9- 1995
[j2]Toshio Tanaka, Tetsuya Higuchi, Tatsumi Furuya: An efficient algorithm for solving optimization problems on Hopfield-type neural networks. Systems and Computers in Japan 26(2): 73-84 (1995)
[c16]Tetsuya Higuchi, Masaya Iwata, Isamu Kajitani, Hitoshi Iba, Yuji Hirao, Tatsumi Furuya, Bernard Manderick: Evolvable Hardware and Its Applications to Pattern Recognition and Fault-Tolerant Systems. Towards Evolvable Hardware 1995: 118-135- 1994
[j1]Tetsuya Higuchi, Ken'ichi Handa, Naoto Takahashi, Tatsumi Furuya, Hitoshi Iida, Eiichiro Sumita, Kozo Oi, Hiroaki Kitano: The IXM2 Parallel Associative Processor for AI. IEEE Computer 27(11): 53-63 (1994)
[c15]Kozo Oi, Eiichiro Sumita, Osamu Furuse, Hitoshi Iida, Tetsuya Higuchi: Real-Time Spoken Language Translation Using Associative Processors. ANLP 1994: 101-106
[c14]Tetsuya Higuchi, Hitoshi Iba, Bernard Manderick: Applying Evolvable Hardware to Autonomous Agents. PPSN 1994: 524-533- 1993
[c13]Hitoshi Iba, Tetsuya Higuchi, Hugo de Garis, Taisuke Sato: Evolutionary Learning Strategy using Bug-Based Search. IJCAI 1993: 960-966
[c12]Eiichiro Sumita, Kozo Oi, Osamu Furuse, Hitoshi Iida, Tetsuya Higuchi, Naoto Takahashi, Hiroaki Kitano: Example-Based Machine Translation on Massively Parallel Processors. IJCAI 1993: 1283-1289- 1992
[c11]Hitoshi Iba, Sumitaka Akiba, Tetsuya Higuchi, Taisuke Sato: BUGS: A Bug-Based Search Strategy using Genetic Algorithms. PPSN 1992: 167-- 1991
[c10]Hiroaki Kitano, Tetsuya Higuchi: High Performance Memory-Based Translation on IXM2 Massively Parallel Associative Memory Processor. AAAI 1991: 149-154
[c9]Tetsuya Higuchi, Hiroaki Kitano, Tatsumi Furuya, Ken'ichi Handa, Akio Kokubu, Naoto Takahashi: IXM2: A Parallel Associative Processor for Knowledge Processing. AAAI 1991: 296-303
[c8]Hiroaki Kitano, Stephen F. Smith, Tetsuya Higuchi: GA-1: A Parallel Associative Memory Processor for Rule Learning with Genetic Algorithms. ICGA 1991: 311-317
[c7]Hiroaki Kitano, James A. Hendler, Tetsuya Higuchi, Dan I. Moldovan, David L. Waltz: Massively Parallel Artificial Intelligence. IJCAI 1991: 557-562
[c6]
[c5]Tetsuya Higuchi, Tatsumi Furuya, Ken'ichi Handa, Naoto Takahashi, Hiroyasu Nishiyama, Akio Kokubu: IXM2: A Parallel Associative Processor. ISCA 1991: 22-31- 1990
[c4]Hiroaki Kitano, Tetsuya Higuchi, Masaru Tomita: Massively parallel spoken language processing using a parallel associative processor IXM2. ICSLP 1990
1980 – 1989
- 1989
[c3]Tetsuya Higuchi, Tatsumi Furuya, Hiroyuki Kusumoto, Ken'ichi Handa, Akio Kokubu: The Prototype of a Semantic Network Machine IXM. ICPP (1) 1989: 217-224- 1987
[c2]Tatsumi Furuya, Tetsuya Higuchi, Hiroyuki Kusumoto, Ken'ichi Handa, Akio Kokubu: Architectural Evaluation of a Semantic Network Machine. IWDM 1987: 544-556- 1986
[c1]Tetsuya Higuchi, Tatsumi Furuya, Hiroyuki Kusumoto, Ken'ichi Handa, Akio Kokubu: The IX Supercomputer for Knowledge-Based Systems. FJCC 1986: 1041-1048
Coauthor Index
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last updated on 2013-04-30 22:18 CEST by the dblp team



