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 | 2012 | |
|---|---|---|
| j18 |      | Sho Endo, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh: A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments. IEICE Transactions 95-A(1): 263-266 (2012) |
| j17 | | Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takeshi Sugawara, Yoshiki Kayano, Takafumi Aoki, Shigeki Minegishi, Akashi Satoh, Hideaki Sone, Hiroshi Inoue: Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current. IEICE Transactions 95-C(6): 1089-1097 (2012) |
| j16 | | Naofumi Homma, Kazuya Saito, Takafumi Aoki: A Formal Approach to Designing Cryptographic Processors Based on $GF(2^m)$ Arithmetic Circuits. IEEE Transactions on Information Forensics and Security 7(1): 3-13 (2012) |
| j15 | | Miroslav Knezevic, Kazuyuki Kobayashi, Jun Ikegami, Shin'ichiro Matsuo, Akashi Satoh, Ünal Koçabas, Junfeng Fan, Toshihiro Katashita, Takeshi Sugawara, Kazuo Sakiyama, Ingrid Verbauwhede, Kazuo Ohta, Naofumi Homma, Takafumi Aoki: Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates. IEEE Trans. VLSI Syst. 20(5): 827-840 (2012) |
| c36 | | Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, Takafumi Aoki: An Efficient Countermeasure against Fault Sensitivity Analysis Using Configurable Delay Blocks. FDTC 2012: 95-102 |
| c35 | | Yongdae Kim, Naofumi Homma, Takafumi Aoki, Heebong Choi: Security Evaluation of Cryptographic Modules against Profiling Attacks. ICISC 2012: 383-394 |
| c34 | | Naofumi Homma, Kazuya Saito, Takafumi Aoki: Formal Design of Multiple-Valued Arithmetic Algorithms over Galois Fields and Its Application to Cryptographic Processor. ISMVL 2012: 110-115 |
| c33 | | Naofumi Homma, Takafumi Aoki: Effective data processing and protection techniques for community network nodes. WPMC 2012: 574-575 |
| 2011 | ||
| j14 | | Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh: High-Performance Architecture for Concurrent Error Detection for AES Processors. IEICE Transactions 94-A(10): 1971-1980 (2011) |
| j13 | | Sho Endo, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh: An on-chip glitchy-clock generator for testing fault injection attacks. J. Cryptographic Engineering 1(4): 265-270 (2011) |
| j12 | | Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh: Systematic Design of RSA Processors Based on High-Radix Montgomery Multipliers. IEEE Trans. VLSI Syst. 19(7): 1136-1146 (2011) |
| c32 | | Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger: Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques. DATE 2011: 1004-1009 |
| c31 | | Kazuya Saito, Naofumi Homma, Takafumi Aoki: A Graph-Based Approach to Designing Multiple-Valued Arithmetic Algorithms. ISMVL 2011: 27-32 |
| 2010 | ||
| j11 | | Naofumi Homma, Yuichi Baba, Atsushi Miyamoto, Takafumi Aoki: Multiple-Valued Constant-Power Adder and Its Application to Cryptographic Processor. IEICE Transactions 93-D(8): 2117-2125 (2010) |
| j10 | | Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, Akashi Satoh, Adi Shamir: Comparative Power Analysis of Modular Exponentiation Algorithms. IEEE Trans. Computers 59(6): 795-807 (2010) |
| c30 | | Akashi Satoh, Toshihiro Katashita, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki: Hardware Implementations of Hash Function Luffa. HOST 2010: 130-134 |
| c29 | | Yuichi Baba, Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki: Design of Tamper-Resistant Registers for Multiple-Valued Cryptographic Processors. ISMVL 2010: 67-72 |
| 2009 | ||
| j9 | | Naofumi Homma, Yuki Watanabe, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi: Systematic Approach to Designing Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language. Multiple-Valued Logic and Soft Computing 15(4): 329-340 (2009) |
| c28 | | Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh: Evaluation of Simple/Comparative Power Analysis against an RSA ASIC Implementation. ISCAS 2009: 2918-2921 |
| c27 | | Yuichi Baba, Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki: Multiple-Valued Constant-Power Adder for Cryptographic Processors. ISMVL 2009: 239-244 |
| c26 | | Takeshi Sugawara, Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, Akashi Satoh: Mechanism behind Information Leakage in Electromagnetic Analysis of Cryptographic Modules. WISA 2009: 66-78 |
| 2008 | ||
| j8 | | Naofumi Homma, Sei Nagashima, Takeshi Sugawara, Takafumi Aoki, Akashi Satoh: A High-Resolution Phase-Based Waveform Matching and Its Application to Side-Channel Attacks. IEICE Transactions 91-A(1): 193-202 (2008) |
| j7 | | Yuki Watanabe, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Arithmetic Circuit Verification Based on Symbolic Computer Algebra. IEICE Transactions 91-A(10): 3038-3046 (2008) |
| j6 | | Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: A Systematic Approach for Designing Redundant Arithmetic Adders Based on Counter Tree Diagrams. IEEE Trans. Computers 57(12): 1633-1646 (2008) |
| c25 | | Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, Akashi Satoh, Adi Shamir: Collision-Based Power Analysis of Modular Exponentiation Using Chosen-Message Pairs. CHES 2008: 15-29 |
| c24 | | Akashi Satoh, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki: High-Performance Concurrent Error Detection Scheme for AES Hardware. CHES 2008: 100-112 |
| c23 | | Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh: Chosen-message SPA attacks against FPGA-based RSA hardware implementations. FPL 2008: 35-40 |
| c22 | | Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh: Systematic design of high-radix Montgomery multipliers for RSA processors. ICCD 2008: 416-421 |
| c21 | | Yuki Watanabe, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Arithmetic module generator with algorithm optimization capability. ISCAS 2008: 1796-1799 |
| c20 | | Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh: High-performance ASIC implementations of the 128-bit block cipher CLEFIA. ISCAS 2008: 2925-2928 |
| c19 | | Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh: Enhanced power analysis attack using chosen message against RSA hardware implementations. ISCAS 2008: 3282-3285 |
| c18 | | Yuki Watanabe, Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi: High-Level Design of Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language. ISMVL 2008: 112-117 |
| c17 | | Toshihiro Katashita, Akashi Satoh, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki: Enhanced Correlation Power Analysis Using Key Screening Technique. ReConFig 2008: 403-408 |
| c16 | | Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh: Compact ASIC Architectures for the 512-Bit Hash Function Whirlpool. WISA 2008: 28-40 |
| 2007 | ||
| j5 | | Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi: Design of Multiple-valued Arithmetic Circuits Using Counter Tree Diagrams. Multiple-Valued Logic and Soft Computing 13(4-6): 487-502 (2007) |
| c15 | | Yuki Watanabe, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Application of symbolic computer algebra to arithmetic circuit verification. ICCD 2007: 25-32 |
| c14 | | Sei Nagashima, Naofumi Homma, Yuichi Imai, Takafumi Aoki, Akashi Satoh: DPA Using Phase-Based Waveform Matching against Random-Delay Countermeasure. ISCAS 2007: 1807-1810 |
| c13 | | Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh: SPA against an FPGA-Based RSA Implementation with a High-Radix Montgomery Multiplier. ISCAS 2007: 1847-1850 |
| c12 | | Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh: A High-Performance ASIC Implementation of the 64-bit Block Cipher CAST-128. ISCAS 2007: 1859-1862 |
| c11 | | Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi: Algorithm-Level Optimization of Multiple-Valued Arithmetic Circuits Using Counter Tree Diagrams. ISMVL 2007: 31 |
| 2006 | ||
| j4 | | Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Systematic Interpretation of Redundant Arithmetic Adders in Binary and Multiple-Valued Logic. IEICE Transactions 89-C(11): 1645-1654 (2006) |
| j3 | | Naofumi Homma, Yuki Watanabe, Takafumi Aoki, Tatsuo Higuchi: Formal Design of Arithmetic Circuits Based on Arithmetic Description Language. IEICE Transactions 89-A(12): 3500-3509 (2006) |
| c10 | | Naofumi Homma, Sei Nagashima, Yuichi Imai, Takafumi Aoki, Akashi Satoh: High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching. CHES 2006: 187-200 |
| c9 | | Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Algorithm-level interpretation of fast adder structures in binary and multiple-valued logic. ISMVL 2006: 2 |
| 2004 | ||
| c8 | | Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Multiplier Block Synthesis Using Evolutionary Graph Generation. Evolvable Hardware 2004: 79-82 |
| c7 |  | Naofumi Homma, Jun Sakiyama, Taihei Wakamatsu, Takafumi Aoki, Tatsuo Higuchi: A systematic approach for analyzing fast addition algorithms using counter tree diagrams. ISCAS (5) 2004: 197-200 |
| c6 | | Kazuya Ishida, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Design and Verification of Parallel Multipliers Using Arithmetic Description Language: ARITH. ISMVL 2004: 334-339 |
| c5 | | Masanori Natsui, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation. PPSN 2004: 342-351 |
| 2003 | ||
| j2 | | Takafumi Aoki, Naofumi Homma, Tatsuo Higuchi: Evolutionary Synthesis of Arithmetic Circuit Structures. Artif. Intell. Rev. 20(3-4): 199-232 (2003) |
| c4 | | Naofumi Homma, Masanori Natsui, Takafumi Aoki, Tatsuo Higuchi: VLSI circuit design using an object-oriented framework of evolutionary graph generation system. IEEE Congress on Evolutionary Computation (1) 2003: 115-122 |
| c3 | | Naofumi Homma, Takafumi Aoki, Makoto Motegi, Tatsuo Higuchi: A framework of evolutionary graph generation system and its application to circuit synthesis. ISCAS (5) 2003: 201-204 |
| 2002 | ||
| j1 | | Dingjun Chen, Takafumi Aoki, Naofumi Homma, Toshiki Terasaki, Tatsuo Higuchi: Graph-based evolutionary design of arithmetic circuits. IEEE Trans. Evolutionary Computation 6(1): 86-100 (2002) |
| c2 | | Makoto Motegi, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Evolutionary Graph Generation System and Its Application to Bit-Serial Arithmetic Circuit Synthesis. PPSN 2002: 831-840 |
| 2001 | ||
| c1 | | Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi: Evolutionary graph generation system with transmigration capability for arithmetic circuit design. ISCAS (5) 2001: 171-174 |
Colors in the list of coauthors
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