Mark Horowitz

Andrew Danowitz, Kyle Kelley, James Mao, John P. Stevenson, Mark Horowitz: CPU DB: recording microprocessor history. Commun. ACM 55(4): 55-63 (2012)

Andrew Adams, David E. Jacobs, Jennifer Dolson, Marius Tico, Kari Pulli, Eino-Ville Talvala, Boris Ajdin, Daniel A. Vaquero, Hendrik P. A. Lensch, Mark Horowitz, Sung Hee Park, Natasha Gelfand, Jongmin Baek, Wojciech Matusik, Marc Levoy: The Frankencamera: an experimental platform for computational photography. Commun. ACM 55(11): 90-98 (2012)

Gordon Wan, Xiangli Li, Gennadiy Agranov, Marc Levoy, Mark Horowitz: CMOS Image Sensors With Multi-Bucket Pixels for Computational Photography. J. Solid-State Circuits 47(4): 1031-1042 (2012)

Andrew Danowitz, Kyle Kelley, James Mao, John P. Stevenson, Mark Horowitz: CPU DB: Recording Microprocessor History. ACM Queue 10(4): 10 (2012)

Qiuling Zhu, Kaushik Vaidyanathan, Ofer Shacham, Mark Horowitz, Larry Pileggi, Franz Franchetti: Design Automation Framework for Application-Specific Logic-in-Memory Blocks. ASAP 2012: 125-132

Ofer Shacham, Sameh Galal, Sabarish Sankaranarayanan, Megan Wachs, John Brunhaver, Artem Vassiliev, Mark Horowitz, Andrew Danowitz, Wajahat Qadeer, Stephen Richardson: Avoiding game over: bringing design to the next level. DAC 2012: 623-629

Kyle Kelley, Megan Wachs, John P. Stevenson, Stephen Richardson, Mark Horowitz: Removing overhead from high-level interfaces. DAC 2012: 783-789

John P. Stevenson, Amin Firoozshahian, Alex Solomatnikov, Mark Horowitz, David R. Cheriton: Sparse matrix-vector multiply on the HICAMP architecture. ICS 2012: 195-204

Krishna T. Malladi, Frank A. Nothaft, Karthika Periyathambi, Benjamin C. Lee, Christos Kozyrakis, Mark Horowitz: Towards energy-proportional datacenter memory with mobile DRAM. ISCA 2012: 37-48

Krishna T. Malladi, Ian Shaeffer, Liji Gopalakrishnan, David Lo, Benjamin C. Lee, Mark Horowitz: Rethinking DRAM Power Modes for Energy Proportionality. MICRO 2012: 131-142

Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz: Understanding sources of ineffciency in general-purpose chips. Commun. ACM 54(10): 85-93 (2011)

Sameh Galal, Mark Horowitz: Energy-Efficient Floating-Point Unit Design. IEEE Trans. Computers 60(7): 913-922 (2011)

Sameh Galal, Mark Horowitz: Latency Sensitive FMA Design. IEEE Symposium on Computer Arithmetic 2011: 129-138

Douglas Densmore, Mark Horowitz, Smita Krishnaswamy, Xiling Shen, Adam Arkin, Erik Winfree, Chris Voigt: Joint DAC/IWBDA special session design and synthesis of biological circuits. DAC 2011: 114-115

Sangho Youn, Jaeha Kim, Mark Horowitz: Global convergence analysis of mixed-signal systems. DAC 2011: 498-503

Kyle Kelley, Megan Wachs, Andrew Danowitz, P. Stevenson, S. Richardon, Mark Horowitz: Intermediate representations for controllers in chip generators. DATE 2011: 1394-1399

Jan M. Rabaey, Hugo De Man, Mark Horowitz, Takayasu Sakurai, Jack Sun, Dan Dobberpuhl, Kiyoo Itoh, Philippe Magarshack, Asad A. Abidi, Hermann Eul: Beyond the horizon: The next 10x reduction in power - Challenges and solutions. ISSCC 2011: 31

Ofer Shacham, Omid Azizi, Megan Wachs, Stephen Richardson, Mark Horowitz: Rethinking Digital Design: Why Design Must Change. IEEE Micro 30(6): 9-24 (2010)

Andrew Adams, David E. Jacobs, Jennifer Dolson, Marius Tico, Kari Pulli, Eino-Ville Talvala, Boris Ajdin, Daniel A. Vaquero, Hendrik P. A. Lensch, Mark Horowitz, Sung Hee Park, Natasha Gelfand, Jongmin Baek, Wojciech Matusik, Marc Levoy: The Frankencamera: an experimental platform for computational photography. ACM Trans. Graph. 29(4) (2010)

Mark Horowitz, Metha Jeeradit, Frances Lau, Sabrina Liao, ByongChan Lim, James Mao: Fortifying analog models with equivalence checking and coverage analysis. DAC 2010: 425-430

Omid Azizi, Aqeel Mahesri, John P. Stevenson, Sanjay J. Patel, Mark Horowitz: An integrated framework for joint design space exploration of microarchitecture and circuits. DATE 2010: 250-255

Mark Horowitz: Why design must change: Rethinking digital design. DATE 2010: 791

Metha Jeeradit, Jaeha Kim, Mark Horowitz: Intent-leveraged optimization of analog circuits via homotopy. DATE 2010: 1614-1619

Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay J. Patel, Mark Horowitz: Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis. ISCA 2010: 26-36

Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz: Understanding sources of inefficiency in general-purpose chips. ISCA 2010: 37-47

Chaomei Chen, Yue Chen, Mark Horowitz, Haiyan Hou, Zeyuan Liu, Donald Pellegrino: Towards an explanatory and computational theory of scientific discovery. J. Informetrics 3(3): 191-209 (2009)

Omid Azizi, Aqeel Mahesri, Sanjay J. Patel, Mark Horowitz: Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design. SIGARCH Computer Architecture News 37(2): 56-65 (2009)

Bita Nezamfar, Mark Horowitz: Energy-performance tunable logic. CICC 2009: 183-186

Bita Nezamfar, Mark Horowitz: In field, energy-performance tunable FPGA architectures. FPL 2009: 262-267

Amin Firoozshahian, Alex Solomatnikov, Ofer Shacham, Zain Asgar, Stephen Richardson, Christos Kozyrakis, Mark Horowitz: A memory system design framework: creating smart memories. ISCA 2009: 406-417

Mark Horowitz: Why design must change: rethinking digital design. MICRO 2009: 267

Alex Solomatnikov, Amin Firoozshahian, Ofer Shacham, Zain Asgar, Megan Wachs, Wajahat Qadeer, Stephen Richardson, Mark Horowitz: Using a configurable processor generator for computer architecture prototyping. MICRO 2009: 358-369

Chaomei Chen, Yue Chen, Mark Horowitz, Haiyan Hou, Zeyuan Liu, Donald Pellegrino: Towards an explanatory and computational theory of scientific discovery. CoRR abs/0904.1439 (2009)

Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis: Comparative evaluation of memory models for chip multiprocessors. TACO 5(3) (2008)

Robert Kunz, Mark Horowitz: The case for simple, visible cache coherency. MSPC 2008: 31-35

Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz: Processor Performance Modeling using Symbolic Simulation. ISPASS 2008: 127-138

Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin Firoozshahian, Stephen Richardson, Mark Horowitz: Verification of chip multiprocessor memory systems using a relaxed scoreboard. MICRO 2008: 294-305

Eino-Ville Talvala, Andrew Adams, Mark Horowitz, Marc Levoy: Veiling glare in high dynamic range imaging. ACM Trans. Graph. 26(3): 37 (2007)

Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman: Robust Energy-Efficient Adder Topologies. IEEE Symposium on Computer Arithmetic 2007: 16-28

Alex Solomatnikov, Amin Firoozshahian, Wajahat Qadeer, Ofer Shacham, Kyle Kelley, Zain Asgar, Megan Wachs, Rehan Hameed, Mark Horowitz: Chip Multi-Processor Generator. DAC 2007: 262-263

Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis: Comparing memory systems for chip multiprocessors. ISCA 2007: 358-368

Mark Horowitz: Scaling, Power and the Future of CMOS. VLSI Design 2007: 23

Marc Levoy, Ren Ng, Andrew Adams, Matthew Footer, Mark Horowitz: Light field microscopy. ACM Trans. Graph. 25(3): 924-934 (2006)

Stephen P. Boyd, Seung-Jean Kim, Dinesh Patil, Mark Horowitz: Digital Circuit Optimization via Geometric Programming. Operations Research 53(6): 899-932 (2005)

Ghazi Al-Rawi, John M. Cioffi, Mark Horowitz: On task mapping optimization for parallel decoding of low-density parity-check codes on message-passing architectures. Parallel Computing 31(5): 462-490 (2005)

Ken Tseng, Mark Horowitz: False coupling exploration in timing analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 24(11): 1795-1805 (2005)

Pradeep Sen, Billy Chen, Gaurav Garg, Stephen R. Marschner, Mark Horowitz, Marc Levoy, Hendrik P. A. Lensch: Dual photography. ACM Trans. Graph. 24(3): 745-755 (2005)

Bennett Wilburn, Neel Joshi, Vaibhav Vaish, Eino-Ville Talvala, Emilio R. Antúnez, Adam Barth, Andrew Adams, Mark Horowitz, Marc Levoy: High performance imaging using large camera arrays. ACM Trans. Graph. 24(3): 765-776 (2005)

Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin Cheung, Mark Horowitz, Stephen P. Boyd: A New Method for Design of Robust Digital Circuits. ISQED 2005: 676-681

Marc Levoy, Billy Chen, Vaibhav Vaish, Mark Horowitz, Ian McDowall, Mark T. Bolas: Synthetic aperture confocal imaging. ACM Trans. Graph. 23(3): 825-834 (2004)

Francois Labonte, Peter R. Mattson, William Thies, Ian Buck, Christos Kozyrakis, Mark Horowitz: The Stream Virtual Machine. IEEE PACT 2004: 267-277

Bennett Wilburn, Neel Joshi, Vaibhav Vaish, Marc Levoy, Mark Horowitz: High-Speed Videography Using a Dense Camera Array. CVPR (2) 2004: 294-301

Elad Alon, Vladimir Stojanovic, Joseph M. Kahn, Stephen P. Boyd, Mark Horowitz: Equalization of modal dispersion in multimode fiber using spatial light modulators. GLOBECOM 2004: 1023-1029

Jan M. Rabaey, Dennis Sylvester, David Blaauw, Kerry Bernstein, Jerry Frenkil, Mark Horowitz, Wolfgang Nebel, Takayasu Sakurai, Andrew Yang: Reshaping EDA for power. DAC 2003: 15

Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong: Design of a 10GHz clock distribution network using coupled standing-wave oscillators. DAC 2003: 682-687

Dean Liu, Stefanos Sidiropoulos, Mark Horowitz: A Framework for Designing Reusable Analog Circuits. ICCAD 2003: 375-381

Mark Horowitz: High-Speed Link Design, Then and Now. ICCD 2003

Isaac Keslassy, Shang-Tse Chuang, Kyoungsik Yu, David Miller, Mark Horowitz, Olav Solgaard, Nick McKeown: Scaling internet routers using optics. SIGCOMM 2003: 189-200

David Lie, Chandramohan A. Thekkath, Mark Horowitz: Implementing an untrusted operating system on trusted hardware. SOSP 2003: 178-192

David Lie, John C. Mitchell, Chandramohan A. Thekkath, Mark Horowitz: Specifying and Verifying Hardware for Tamper-Resistant Software. IEEE Symposium on Security and Privacy 2003: 166-

Robert W. Brodersen, Mark Horowitz, Dejan Markovic, Borivoje Nikolic, Vladimir Stojanovic: Methods for true power minimization. ICCAD 2002: 35-42

Jeff Solomon, Mark Horowitz: Using Texture Mapping with Mipmapping to Render a VLSI Layout. DAC 2001: 500-505

Ghazi Al-Rawi, John M. Cioffi, Mark Horowitz: Optimizing the Mapping of Low-Density Parity Check Codes on Parallel Decoding Architectures. ITCC 2001: 578-

David Lie, Chandramohan A. Thekkath, Mark Mitchell, Patrick Lincoln, Dan Boneh, John C. Mitchell, Mark Horowitz: Architectural Support for Copy and Tamper Resistant Software. ASPLOS 2000: 168-177

Rob A. Rutenbar, Cheming Hu, Mark Horowitz, Stephen Y. Chow: Life at the end of CMOS scaling (and beyond) (panel session) (abstract only). DAC 2000: 85

Junji Ogawa, Mark Horowitz: A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro. Intelligent Memory Systems 2000: 1-14

Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, William J. Dally, Mark Horowitz: Smart Memories: a modular reconfigurable architecture. ISCA 2000: 161-171

David L. Harris, Mark Horowitz, Dean Liu: Timing analysis including clock skew. IEEE Trans. on CAD of Integrated Circuits and Systems 18(11): 1608-1618 (1999)

Jules P. Bergmann, Mark Horowitz: Vex - A CAD Toolbox. DAC 1999: 523-528

Hema Kapadia, Mark Horowitz: Using Partitioning to Help Convergence in the Standard-Cell Design Automation Methodology. DAC 1999: 592-597

Ron Ho, Ken Mai, Hema Kapadia, Mark Horowitz: Interconnect scaling implications for CAD. ICCAD 1999: 425-429

Jules P. Bergmann, Mark Horowitz: Improving coverage analysis and test generation for large designs. ICCAD 1999: 580-583

Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications. ACM Trans. Comput. Syst. 16(2): 170-205 (1998)

Shankar G. Govindaraju, David L. Dill, Alan J. Hu, Mark Horowitz: Approximate Reachability with BDDs Using Overlapping Projections. DAC 1998: 451-456

Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz: An Evaluation of Directory Schemes for Cache Coherence. 25 Years ISCA: Retrospectives and Reprints 1998: 353-362

Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy: The Stanford FLASH Multiprocessor. 25 Years ISCA: Retrospectives and Reprints 1998: 485-496

Nick McKeown, Martin Izzard, Adisak Mekkittikul, Bill Ellersick, Mark Horowitz: The Tiny Tera: A Packet Switch Core. CoRR cs.NI/9810006 (1998)

David L. Harris, Stuart F. Oberman, Mark Horowitz: SRT Division Architectures and Implementations. IEEE Symposium on Computer Arithmetic 1997: 18-25

Dan Teodosiu, Joel Baxter, Kinshuk Govil, John Chapin, Mendel Rosenblum, Mark Horowitz: Hardware Fault Containment in Scalable Shared-Memory Multiprocessors. ISCA 1997: 73-84

Richard C. Ho, Mark Horowitz: Validation coverage analysis for complex digital designs. ICCAD 1996: 146-151

Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors. ISCA 1996: 260-270

Gu-Yeon Wei, Mark Horowitz: A low power switching power supply for self-clocked systems. ISLPED 1996: 313-317

Mark Horowitz, Jan M. Rabaey, Brock Barton, Massoud Pedram (Eds.): Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996, Monterey, California, USA, August 12-14, 1996. IEEE 1996, isbn 0-7803-3571-6

H. Dhanesha, K. Falakshahi, Mark Horowitz: Array-of-arrays architecture for parallel floating point multiplication. ARVLSI 1995: 150-157

Richard C. Ho, C. Han Yang, Mark Horowitz, David L. Dill: Architecture Validation for Processors. ISCA 1995: 404-413

Kimiyoshi Usami, Mark Horowitz: Clustered voltage scaling technique for low-power design. ISLPD 1995: 3-8

Russell Kao, Mark Horowitz: Eliminating redundant DC equations for asymptotic waveform evaluation. IEEE Trans. on CAD of Integrated Circuits and Systems 13(3): 396-397 (1994)

Russell Kao, Mark Horowitz: Timing analysis for piecewise linear Rsim. IEEE Trans. on CAD of Integrated Circuits and Systems 13(12): 1498-1512 (1994)

Mark E. Dean, David L. Dill, Mark Horowitz: Self-timed logic using Current-Sensing Completion Detection (CSCD). VLSI Signal Processing 7(1-2): 7-16 (1994)

Mark Heinrich, Jeffrey Kuskin, David Ofelt, John Heinlein, Joel Baxter, Jaswinder Pal Singh, Richard Simoni, Kourosh Gharachorloo, David Nakahira, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy: The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor. ASPLOS 1994: 274-285

James Laudon, Anoop Gupta, Mark Horowitz: Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations. ASPLOS 1994: 308-318

Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy: The Stanford FLASH Multiprocessor. ISCA 1994: 302-313

James A. Gasbarro, Mark Horowitz: Techniques for Characterizing DRAMs With a 500-MHz Interface. ITC 1994: 516-525

Russell Kao, Mark Horowitz: Piecewise linear models for Rsim. ICCAD 1993: 753-758

Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Wolf-Dietrich Weber, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica S. Lam: The Stanford Dash Multiprocessor. IEEE Computer 25(3): 63-79 (1992)

Michael D. Smith, Mark Horowitz, Monica S. Lam: Efficient Superscalar Performance Through Boosting. ASPLOS 1992: 248-259

Mark E. Dean, David L. Dill, Mark Horowitz: Self-Timed Logic Using Current-Sensing Completion Detection (CSCD). ICCD 1991: 187-191

Richard Simoni, Mark Horowitz: Modeling the Performance of Limited Pointers Directories for Cache Coherence. ISCA 1991: 309-319

Don Stark, Mark Horowitz: Techniques for calculating currents and voltages in VLSI power supply networks. IEEE Trans. on CAD of Integrated Circuits and Systems 9(2): 126-132 (1990)

Michael D. Smith, Monica S. Lam, Mark Horowitz: Boosting Beyond Static Scheduling in a Superscalar Processor. ISCA 1990: 344-354

Anant Agarwal, Mark Horowitz, John L. Hennessy: An Analytical Cache Model. ACM Trans. Comput. Syst. 7(2): 184-215 (1989)

Michael D. Smith, Mike Johnson, Mark Horowitz: Limits on Multiple Instruction Issue. ASPLOS 1989: 290-302

A. Salz, Mark Horowitz: IRSIM: An Incremental MOS Switch-Level Simulator. DAC 1989: 173-178

Steven A. Przybylski, Mark Horowitz, John L. Hennessy: Characteristics of Performance-Optimal Multi-Level Cache Hierarchies. ISCA 1989: 114-121

Anant Agarwal, John L. Hennessy, Mark Horowitz: Cache Performance of Operating System and Multiprogramming Workloads. ACM Trans. Comput. Syst. 6(4): 393-431 (1988)

Don Stark, Mark Horowitz: Analyzing CMOS Power Supply Networks Using Ariel. DAC 1988: 460-464

Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz: An Evaluation of Directory Schemes for Cache Coherence. ISCA 1988: 280-289

Steven A. Przybylski, Mark Horowitz, John L. Hennessy: Performance Tradeoffs in Cache Design. ISCA 1988: 290-298

Chorng-Yeong Chu, Mark Horowitz: Charge-Sharing Models for Switch-Level Simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 6(6): 1053-1061 (1987)

C. W. Carpenter, Mark Horowitz: Generating Incremental VLSI Compaction Spacing Constraints. DAC 1987: 291-297

Don Stark, Mark Horowitz: RED: Resistance Extraction for Digital Simulation. DAC 1987: 570-573

Paul Chow, Mark Horowitz: Architectural Tradeoffs in the Design of MIPS-X. ISCA 1987: 300-308

Anant Agarwal, Richard L. Sites, Mark Horowitz: ATUM: A New Technique for Capturing Address Traces Using Microcode. ISCA 1986: 119-127

Mark Horowitz, Robert W. Dutton: Resistance Extraction from Mask Layout Data. IEEE Trans. on CAD of Integrated Circuits and Systems 2(3): 145-150 (1983)