| 2012 | ||
|---|---|---|
| c2 | Mengmeng Ling, Liji Wu, Xiangyu Li, Xiangmin Zhang, Jinsong Hou, Yong Wang: Design of Monitor and Protect Circuits against FIB Attack on Chip Security. CIS 2012: 530-533 | |
| 1999 | ||
| c1 | Jinsong Hou, Zeyi Wang, Xianlong Hong: The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance. ASP-DAC 1999: 93- | |
| 1 | Xianlong Hong | |
| 2 | Xiangyu Li | |
| 3 | Mengmeng Ling | |
| 4 | Yong Wang | |
| 5 | Zeyi Wang | |
| 6 | Liji Wu | |
| 7 | Xiangmin Zhang |
Colors in the list of coauthors
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