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Yu Hu
2010 – today
- 2013
[j29]Sina Basir-Kazeruni, Hao Yu, Fang Gong, Yu Hu, Chunchen Liu, Lei He: SPECO: Stochastic Perturbation based Clock tree Optimization considering temperature uncertainty. Integration 46(1): 22-32 (2013)- [c102]Xing Hu, Guihai Yan, Yu Hu, Xiaowei Li: Orchestrator: a low-cost solution to reduce voltage emergencies for multi-threaded applications. DATE 2013: 208-213
- [c101]Xiaolin Zhang, Jing Ye, Yu Hu, Xiaowei Li: Capturing post-silicon variation by layout-aware path-delay testing. DATE 2013: 288-291
- 2012
- [j28]James Trousdale, Yu Hu, Eric Shea-Brown, Kresimir Josic: Impact of Network Structure and Cellular Response on Spike Time Correlations. PLoS Computational Biology 8(3) (2012)
- [j27]Songjun Pan, Yu Hu, Xiaowei Li: IVF: Characterizing the Vulnerability of Microprocessor Structures to Intermittent Faults. IEEE Trans. VLSI Syst. 20(5): 777-790 (2012)
- [c100]Yu Hu, Xinli Gu, Xiaowei Li: In-Field Testing of NAND Flash Storage: Why and How? Asian Test Symposium 2012: 69
- [c99]Keheng Huang, Yu Hu, Xiaowei Li, Bo Liu, Hongjin Liu, Jian Gong: Off-path leakage power aware routing for SRAM-based FPGAs. DATE 2012: 87-92
- [c98]Yu Hu, Hans Hellendoorn: An approach for traffic networks optimization based on urban properties. ICNSC 2012: 91-96
- [c97]Jia Pan, Cong Liu, Zhiguo Wang, Yu Hu, Hui Jiang: Investigation of deep neural networks (DNN) for large vocabulary continuous speech recognition: Why DNN surpasses GMMS in acoustic modeling. ISCSLP 2012: 301-305
- 2011
- [j26]Jia Li, Yu Hu, Xiaowei Li: Scan chain design for shift power reduction in scan-based testing. SCIENCE CHINA Information Sciences 54(4): 767-777 (2011)
- [j25]Lei He, Shauki Elassaad, Yiyu Shi, Yu Hu, Wei Yao: System-in-Package: Electrical and Layout Perspectives. Foundations and Trends in Electronic Design Automation 4(4): 223-306 (2011)
- [j24]Lihong Shang, Mi Zhou, Yu Hu, Erfu Yang: A Domain Partition Model Approach to the Online Fault Recovery of FPGA-Based Reconfigurable Systems. IEICE Transactions 94-A(1): 290-299 (2011)
- [j23]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu: Capture-power-aware test data compression using selective encoding. Integration 44(3): 205-216 (2011)
- [j22]Yu Hu, Kin-Man Lam, Tingzhi Shen, Weijiang Wang: A novel kernel-based framework for facial-image hallucination. Image Vision Comput. 29(4): 219-229 (2011)
- [j21]Jun Du, Yu Hu, Hui Jiang: Boosted Mixture Learning of Gaussian Mixture Hidden Markov Models Based on Maximum Likelihood for Speech Recognition. IEEE Transactions on Audio, Speech & Language Processing 19(7): 2091-2100 (2011)
- [j20]Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Zhigang Jiang, Lang Tan, Yu Zhang, Yu Hu, Wen-Ben Jone, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Lizhen Yu: Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 30(3): 455-463 (2011)
- [j19]Wenyao Xu, Jia Wang, Yu Hu, Ju-Yueh Lee, Fang Gong, Lei He, Majid Sarrafzadeh: In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults. IEEE Trans. on Circuits and Systems 58-I(6): 1372-1381 (2011)
- [j18]Yu Hu, Kin-Man Lam, Guoping Qiu, Tingzhi Shen: From Local Pixel Structure to Global Image Super-Resolution: A New Face Hallucination Framework. IEEE Transactions on Image Processing 20(2): 433-445 (2011)
- [c96]Keheng Huang, Yu Hu, Xiaowei Li, Gengxin Hua, Hongjin Liu, Bo Liu: Exploiting Free LUT Entries to Mitigate Soft Errors in SRAM-based FPGAs. Asian Test Symposium 2011: 438-443
- [c95]Keheng Huang, Yu Hu, Xiaowei Li: Cross-layer optimized placement and routing for FPGA soft error mitigation. DATE 2011: 58-63
- [c94]Songjun Pan, Yu Hu, Xing Hu, Xiaowei Li: A cost-effective substantial-impact-filter based method to tolerate voltage emergencies. DATE 2011: 311-315
- [c93]Jing Ye, Yu Hu, Xiaowei Li: On diagnosis of multiple faults using compacted responses. DATE 2011: 679-684
- [c92]Shuchang Shan, Yu Hu, Xiaowei Li: Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors. DSN 2011: 291-302
- [c91]Lintao Cui, Jing Chen, Yu Hu, Jinjun Xiong, Zhe Feng, Lei He: Acceleration of Multi-agent Simulation on FPGAs. FPL 2011: 470-473
- [c90]Zhe Feng, Naifeng Jing, GengSheng Chen, Yu Hu, Lei He: IPF: In-Place X-Filling to Mitigate Soft Errors in SRAM-Based FPGAs. FPL 2011: 482-485
- [c89]Xiaoyu Shi, Dahua Zeng, Yu Hu, Guohui Lin, Osmar R. Zaïane: Enhancement of incremental design for FPGAs using circuit similarity. ISQED 2011: 243-250
- 2010
- [j17]Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Accelerating Boolean Matching Using Bloom Filter. IEICE Transactions 93-A(10): 1775-1781 (2010)
- [j16]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. IEEE Trans. VLSI Syst. 18(7): 1081-1092 (2010)
- [c88]Lihong Shang, Mi Zhou, Yu Hu: A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration. AHS 2010: 297-303
- [c87]Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He, Minming Li: Fault-tolerant resynthesis with dual-output LUTs. ASP-DAC 2010: 325-330
- [c86]Jing Ye, Xiaolin Zhang, Yu Hu, Xiaowei Li: Substantial Fault Pair At-a-Time (SFPAT): An Automatic Diagnostic Pattern Generation Method. Asian Test Symposium 2010: 192-197
- [c85]
- [c84]Songjun Pan, Yu Hu, Xiaowei Li: IVF: Characterizing the vulnerability of microprocessor structures to intermittent faults. DATE 2010: 238-243
- [c83]Samuel B. Luckenbill, Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He: RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications. DATE 2010: 783-788
- [c82]Jing Ye, Yu Hu, Xiaowei Li: Diagnosis of multiple arbitrary faults with mask and reinforcement effect. DATE 2010: 885-890
- [c81]Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Building a faster boolean matcher using bloom filter. FPGA 2010: 185-188
- [c80]Xiaoyu Shi, Dahua Zeng, Yu Hu, Guohui Lin, Osmar R. Zaïane: Accelerating FPGA design space exploration using circuit similarity-based placement. FPT 2010: 373-376
- [c79]Yongzhi Wang, Yehua Sheng, Liangchen Zhou, Fei Guo, Yu Hu: An algorithm on discrimination of point-set in polyhedron based on three-dimensional convex hull. Geoinformatics 2010: 1-5
- [c78]Jun Du, Yu Hu, Li-Rong Dai, Ren-Hua Wang: HMM-based pseudo-clean speech synthesis for splice algorithm. ICASSP 2010: 4570-4573
- [c77]Cong Liu, Yu Hu, Hui Jiang, Li-Rong Dai: A bounded trust region optimization for discriminative training of HMMS in speech recognition. ICASSP 2010: 4914-4917
- [c76]Manu Jose, Yu Hu, Rupak Majumdar: On power and fault-tolerance optimization in FPGA physical synthesis. ICCAD 2010: 224-229
- [c75]Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Engineering a scalable Boolean matching based on EDA SaaS 2.0. ICCAD 2010: 750-755
- [c74]Yu Hu, Kin-Man Lam, Guoping Qiu, Tingzhi Shen, Hui Tian: Learning local pixel structure for face hallucination. ICIP 2010: 2797-2800
- [c73]Zhen-Hua Ling, Yu Hu, Li-Rong Dai: Global variance modeling on the log power spectrum of LSPs for HMM-based speech synthesis. INTERSPEECH 2010: 825-828
- [c72]Jun Du, Yu Hu, Hui Jiang: Boosted mixture learning of Gaussian mixture HMMs for speech recognition. INTERSPEECH 2010: 2942-2945
2000 – 2009
- 2009
- [j15]Si Wei, Guoping Hu, Yu Hu, Ren-Hua Wang: A new method for mispronunciation detection using Support Vector Machine based on Pronunciation Space Models. Speech Communication 51(10): 896-905 (2009)
- [j14]Yu Hu, Satyaki Das, Steven Trimberger, Lei He: Design and Synthesis of Programmable Logic Block With Mixed LUT and Macrogate. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 591-595 (2009)
- [c71]Pengzhang Liu, Tingzhi Shen, Yu Hu, Sanyuan Zhao: Face Recognition Using Modular Locality Preserving Projections. CIS (1) 2009: 320-324
- [c70]Mi Zhou, Lihong Shang, Yu Hu: Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System. HPCC 2009: 369-375
- [c69]Zhi-Jie Yan, Cong Liu, Yu Hu, Hui Jiang: A trust region based optimization for maximum mutual information estimation of HMMS in speech recognition. ICASSP 2009: 3757-3760
- [c68]Zhe Feng, Yu Hu, Lei He, Rupak Majumdar: IPR: In-Place Reconfiguration for FPGA fault tolerance. ICCAD 2009: 105-108
- [c67]Mi Zhou, Lihong Shang, Yu Hu: Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition. ICESS 2009: 511-516
- [c66]Yu Hu, Tingzhi Shen, Kin-Man Lam: Region-based Eigentransformation for Face Image Hallucination. ISCAS 2009: 1421-1424
- [c65]Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, Yu Hu: Worst case timing jitter and amplitude noise in differential signaling. ISQED 2009: 40-46
- [c64]Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He: Simultaneous test pattern compaction, ordering and X-filling for testing power reduction. ISQED 2009: 702-707
- [c63]Songjun Pan, Yu Hu, Xiaowei Li: Online Computing and Predicting Architectural Vulnerability Factor of Microprocessor Structures. PRDC 2009: 345-350
- 2008
- [j13]Tom Tong Jing, Yu Hu, Zhe Feng, Xianlong Hong, Xiaodong Hu, Guiying Yan: A full-scale solution to the rectilinear obstacle-avoiding Steiner problem. Integration 41(3): 413-425 (2008)
- [j12]Da Wang, Yu Hu, Huawei Li, Xiaowei Li: Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor. J. Comput. Sci. Technol. 23(6): 1037-1046 (2008)
- [j11]Zhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Zhe Feng, Lei He, Xianlong Hong: Fashion: A Fast and Accurate Solution to Global Routing Problem. IEEE Trans. on CAD of Integrated Circuits and Systems 27(4): 726-737 (2008)
- [j10]King Ho Tam, Yu Hu, Lei He, Tom Tong Jing, Xinyi Zhang: Dual-Vdd Buffer Insertion for Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1498-1502 (2008)
- [j9]Yu Hu, Victor Shih, Rupak Majumdar, Lei He: Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1751-1760 (2008)
- [j8]Yu Hu, Yan Lin, Lei He, Tim Tuan: Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming. ACM Trans. Design Autom. Electr. Syst. 13(2) (2008)
- [c62]Yu Hu, Xiang Fu, Xiaoxin Fan, Hideo Fujiwara: Localized random access scan: Towards low area and routing overhead. ASP-DAC 2008: 565-570
- [c61]Fei Wang, Yu Hu, Huawei Li, Xiaowei Li: A design- for-diagnosis technique for diagnosing both scan chain faults and combinational circuit faults. ASP-DAC 2008: 571-576
- [c60]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: On reducing both shift and capture power for scan-based testing. ASP-DAC 2008: 653-658
- [c59]Xiang Fu, Huawei Li, Yu Hu, Xiaowei Li: Robust test generation for power supply noise induced path delay faults. ASP-DAC 2008: 659-662
- [c58]Yu Hu, Tingzhi Shen, Kin-Man Lam, Sanyuan Zhao: A Novel Example-Based Super-Resolution Approach Based on Patch Classification and the KPCA Prior Model. CIS (1) 2008: 6-11
- [c57]Yu Hu, Victor Shih, Rupak Majumdar, Lei He: FPGA area reduction by multi-output function based sequential resynthesis. DAC 2008: 24-29
- [c56]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. DATE 2008: 1184-1189
- [c55]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction. DELTA 2008: 26-31
- [c54]Fei Wang, Yu Hu, Xiaowei Li: Adaptive Diagnostic Pattern Generation for Scan Chains. DELTA 2008: 129-132
- [c53]Da Wang, Rui Li, Yu Hu, Huawei Li, Xiaowei Li: A Case Study on At-Speed Testing for a Gigahertz Microprocessor. DELTA 2008: 326-331
- [c52]Hui Liu, Huawei Li, Yu Hu, Xiaowei Li: A Scan-Based Delay Test Method for Reduction of Overtesting. DELTA 2008: 521-526
- [c51]Zhi-Jie Yan, Bo Zhu, Yu Hu, Ren-Hua Wang: Minimum word classification error training of HMMS for automatic speech recognition. ICASSP 2008: 4521-4524
- [c50]Sibao Chen, Yu Hu, Bin Luo, Ren-Hua Wang: Heteroscedastic discriminant analysis with two-dimensional constraints. ICASSP 2008: 4701-4704
- [c49]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu: On capture power-aware test data compression for scan-based testing. ICCAD 2008: 67-72
- [c48]Yu Hu, Zhe Feng, Lei He, Rupak Majumdar: Robust FPGA resynthesis based on fault-tolerant Boolean matching. ICCAD 2008: 706-713
- [c47]
- [c46]Jing Ye, Fei Wang, Yu Hu, Xiaowei Li: Diagnosis of Mask-Effect Multiple Timing Faults in Scan Chains. ITC 2008: 1
- [c45]Ying Zhang, Huawei Li, Xiaowei Li, Yu Hu: Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects. VTS 2008: 377-382
- 2007
- [j7]Wei Wang, Yu Hu, Yinhe Han, Xiaowei Li, You-Sheng Zhang: Leakage Current Optimization Techniques During Test Based on Don't Care Bits Assignment. J. Comput. Sci. Technol. 22(5): 673-680 (2007)
- [j6]Tom Tong Jing, Zhe Feng, Yu Hu, Xianlong Hong, Xiaodong Hu, Guiying Yan: lambda-OAT: lambda-Geometry Obstacle-Avoiding Tree Construction With O(nlog n) Complexity. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 2073-2079 (2007)
- [j5]Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra: Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit. IEEE Trans. VLSI Syst. 15(5): 531-540 (2007)
- [c44]Zhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Lei He, Xianlong Hong: DpRouter: A Fast and Accurate Dynamic-Pattern-Based Global Routing Algorithm. ASP-DAC 2007: 256-261
- [c43]Yu Hu, Satyaki Das, Steven Trimberger, Lei He: Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates. ICCAD 2007: 188-193
- [c42]Yu Hu, Victor Shih, Rupak Majumdar, Lei He: Exploiting symmetry in SAT-based Boolean matching for heterogeneous FPGA technology mapping. ICCAD 2007: 350-353
- [c41]Yu Hu, Qiang Huo: Irrelevant variability normalization based HMM training using VTS approximation of an explicit model of environmental distortions. INTERSPEECH 2007: 1042-1045
- [c40]Yu Hu, Qing Li, Siwei Ma, C. C. Jay Kuo: Decoder-Friendly Adaptive Deblocking Filter (DF-ADF) Mode Decision in H.264/AVC. ISCAS 2007: 3976-3979
- [c39]Hao Yu, Yu Hu, Chunchen Liu, Lei He: Minimal skew clock embedding considering time variant temperature gradient. ISPD 2007: 173-180
- [c38]Da Wang, Xiaoxin Fan, Xiang Fu, Hui Liu, Ke Wen, Rui Li, Huawei Li, Yu Hu, Xiaowei Li: The design-for-testability features of a general purpose microprocessor. ITC 2007: 1-9
- [c37]Yu Hu, King Ho Tam, Tong Jing, Lei He: Fast dual-vdd buffering based on interconnect prediction and sampling. SLIP 2007: 95-102
- 2006
- [j4]Yu Hu, Yinhe Han, Xiaowei Li, Huawei Li, Xiaoqing Wen: Compression/Scan Co-design for Reducing Test Data Volume, Scan-in Power Dissipation, and Test Application Time. IEICE Transactions 89-D(10): 2616-2625 (2006)
- [j3]Yu Hu, Tong Jing, Zhe Feng, Xianlong Hong, Xiaodong Hu, Guiying Yan: ACO-Steiner: Ant Colony Optimization Based Rectilinear Steiner Minimal Tree Algorithm. J. Comput. Sci. Technol. 21(1): 147-152 (2006)
- [c36]Zhen Cao, Tong Jing, Yu Hu, Yiyu Shi, Xianlong Hong, Xiaodong Hu, Guiying Yan: DraXRouter: global routing in X-Architecture with dynamic resource assignment. ASP-DAC 2006: 618-623
- [c35]
- [c34]Wei-Yang Lin, Kin-Chung Wong, Yu Hu, Nigel Boston: Face Recognition using 3D Summation Invariant Features. ICME 2006: 1733-1736
- [c33]Yu Hu, Qing Li, Siwei Ma, C. C. Jay Kuo: Joint Rate-Distortion-Complexity Optimization for H.264 Motion Search. ICME 2006: 1949-1952
- [c32]Yu Hu, Qing Li, Siwei Ma, C. C. Jay Kuo: Fast H.264/AVC Inter-Mode Decision with RDC Optimization. IIH-MSP 2006: 511-516
- [c31]
- [c30]Si Wei, Qing-Sheng Liu, Yu Hu, Ren-Hua Wang: Automatic Mandarin pronunciation scoring for native learners with dialect accent. INTERSPEECH 2006
- [c29]Jie Don, Yu Hu, Yinhe Han, Xiaowei Li: An on-chip combinational decompressor for reducing test data volume. ISCAS 2006
- [c28]Yu Hu, Qiang Huo: An HMM Compensation Approach Using Unscented Transformation for Noisy Speech Recognition. ISCSLP 2006: 346-357
- [c27]Yan Lin, Yu Hu, Lei He, Vijay Raghunat: An efficient chip-level time slack allocation algorithm for Dual-Vdd FPGA power reduction. ISLPED 2006: 168-173
- [c26]Zhe Feng, Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan: An O(nlogn) algorithm for obstacle-avoiding routing tree construction in the lambda-geometry plane. ISPD 2006: 48-55
- 2005
- [j2]Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra, Xiaoqing Wen: Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores. IEICE Transactions 88-D(9): 2126-2134 (2005)
- [c25]Zhen-Hua Ling, Yu Hu, Ren-Hua Wang: A Novel Source Analysis Method by Matching Spectral Characters of LF Model with STRAIGHT Spectrum. ACII 2005: 441-448
- [c24]Yang Yang, Tong Jing, Xianlong Hong, Yu Hu, Qi Zhu, Xiaodong Hu, Guiying Yan: Via-Aware Global Routing for Good VLSI Manufacturability and High Yield. ASAP 2005: 198-203
- [c23]Yu Hu, Tong Jing, Xianlong Hong, Zhe Feng, Xiaodong Hu, Guiying Yan: An-OARSMan: obstacle-avoiding routing tree construction with good length performance. ASP-DAC 2005: 7-12
- [c22]Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li: Theoretic analysis and enhanced X-tolerance of test response compact based on convolutional code. ASP-DAC 2005: 53-58
- [c21]Yinhe Han, Xiaowei Li, Shivakumar Swaminathan, Yu Hu, Anshuman Chandra: Scan Data Volume Reduction Using Periodically Alterable MUXs Decompressor. Asian Test Symposium 2005: 372-377
- [c20]Hansjörg Mixdorff, Yu Hu, Denis Burnham: Visual cues in Mandarin tone perception. INTERSPEECH 2005: 405-408
- [c19]
- [c18]Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li: Using MUXs Network to Hide Bunches of Scan Chains. ISQED 2005: 238-243
- [c17]Yu Hu, Xiaowei Li, Huawei Li, Xiaoqing Wen: Compression/Scan Co-Design for Reducing Test Data Volume, Scan-in Power Dissipation and Test Application Time. PRDC 2005: 175-182
- [c16]Yu Hu, Qing Li, C. C. Jay Kuo: Run-Time Power Consumption Modeling for Embedded Multimedia Systems. RTCSA 2005: 353-356
- [c15]Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan: A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design. SAMOS 2005: 344-353
- 2004
- [c14]Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra: Rapid and Energy-Efficient Testing for Embedded Cores. Asian Test Symposium 2004: 8-13
- [c13]Yu Hu, Yinhe Han, Huawei Li, Tao Lv, Xiaowei Li: Pair Balance-Based Test Scheduling for SOCs. Asian Test Symposium 2004: 236-241
- [c12]Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra: Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes. DFT 2004: 298-305
- [c11]Yu Hu, Qing Li, C. C. Jay Kuo: Efficient implementation of elliptic curve cryptography (ECC) on VLIW-micro-architecture media processor. ICME 2004: 879-882
- [c10]Yu Hu, Ren-Hua Wang, Lu Sun: Polynomial regression model for duration prediction in Mandarin. INTERSPEECH 2004
- [c9]Zhen-Hua Ling, Yu Hu, Zhiwei Shuang, Ren-Hua Wang: Compression of speech database by feature separation and pattern clustering using STRAIGHT. INTERSPEECH 2004
- 2003
- [c8]
- [c7]Gary S. H. Tan, Yu Hu, Farshad Moradi: Automatic SOM Compatibility Check and FOM Development. DS-RT 2003: 60-67
- [c6]Hansjörg Mixdorff, Hiroya Fujisaki, Gao Peng Chen, Yu Hu: Towards the automatic extraction of fujisaki model parameters for Mandarin. INTERSPEECH 2003
- 2002
- [c5]Zhiwei Shuang, Yu Hu, Zhen-Hua Ling, Ren-Hua Wang: A miniature Chinese TTS system based on tailored corpus. INTERSPEECH 2002
- [c4]Yi-Jian Wu, Yu Hu, Xiaoru Wu, Ren-Hua Wang: A new method of building decision tree based on target information. INTERSPEECH 2002
- 2000
- [c3]Ren-Hua Wang, Qingfeng Liu, Yu Hu, Bo Yin, Xiaoru Wu: KD2000 Chinese Text-To-Speech System. ICMI 2000: 300-307
- [c2]Yu Hu, Qingfeng Liu, Ren-Hua Wang: Prosody generation in Chinese synthesis using the template of quantified prosodic unit and base intonation contour. INTERSPEECH 2000: 55-58
1990 – 1999
- 1996
- [j1]Yu Hu, S. Lennart Johnsson: Implementing O(N) N-Body Algorithms Efficiently in Data-Parallel Languages. Scientific Programming 5(4): 337-364 (1996)
- [c1]Yu Hu, S. Lennart Johnsson: A Data-Parallel Implementation of O(N) Hierarchical N-Body Methods. SC 1996: 2
Coauthor Index
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last updated on 2013-05-25 21:17 CEST by the dblp team