Ed P. Huijbregts Coauthor index pubzone.org

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DBLP keys2005
c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Tim Fox, Lou Covey, Susan Mack, David Heacock, Ed P. Huijbregts, Vess Johnson, Avner Kornfeld, Andrew Yang, Paul S. Zuchowski: Should our power approach be current? DAC 2005: 611
2003
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Raymond X. Nijssen, Ed P. Huijbregts: A complete design for power methodology and flow for large ASICs. ISPD 2003: 106-108
1994
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Hua Xue, Ed P. Huijbregts, Jochen A. G. Jess: Routing for Manufacturability. DAC 1994: 402-406
c2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Ed P. Huijbregts, Jos T. J. van Eijndhoven, Jochen A. G. Jess: On Design Rule Correct Maze Routing. EDAC-ETC-EUROASIC 1994: 407-411
1993
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Ed P. Huijbregts, Jochen A. G. Jess: General gate array routing using a k-terminal net routing algorithm with failure prediction. IEEE Trans. VLSI Syst. 1(4): 473-481 (1993)
c1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Ed P. Huijbregts, Jochen A. G. Jess: A Multiple Terminal Net Routing Algorithm Using Failure Prediction. VLSI Design 1993: 84-89

Coauthor Index

1Lou Covey
[c5]
2Jos T. J. van Eijndhoven
[c2]
3Tim Fox
[c5]
4David Heacock
[c5]
5Jochen A. G. Jess
[c3] [c2] [j1] [c1]
6Vess Johnson
[c5]
7Avner Kornfeld
[c5]
8Susan Mack
[c5]
9Raymond X. Nijssen
[c4]
10Hua Xue
[c3]
11Andrew Yang
[c5]
12Paul S. Zuchowski
[c5]

Colors in the list of coauthors

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