Hiroki Ishikuro

Akira Shikata, Ryota Sekimoto, Kentaro Yoshioka, Tadahiro Kuroda, Hiroki Ishikuro: A 4-10 bit, 0.4-1 V Power Supply, Power Scalable Asynchronous SAR-ADC in 40 nm-CMOS with Wide Supply Voltage Range SAR Controller. IEICE Transactions 96-A(2): 443-452 (2013)

Tsutomu Takeya, Lan Nan, Shinya Nakano, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: A 12-Gb/s Non-Contact Interface With Coupled Transmission Lines. J. Solid-State Circuits 48(3): 790-800 (2013)

Atsutake Kosuge, Wataru Mizuhara, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda: A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched Transmission Line Couplers and Dicode partial-response channel transceivers. ASP-DAC 2013: 91-92

Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro: A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADC. ASP-DAC 2013: 111-112

Wataru Mizuhara, Tsunaaki Shidei, Atsutake Kosuge, Tsutomu Takeya, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda: A 0.15mm-thick non-contact connector for MIPI using vertical directional coupler. ISSCC 2013: 200-201

Yasuhiro Take, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: 3D clock distribution using vertically/horizontally-coupled resonators. ISSCC 2013: 258-259

Teruo Jyo, Tadahiro Kuroda, Hiroki Ishikuro: A 0.8V 1.1pJ/bit inductive-coupling receiver with pulse extracting clock recovery circuit and intermittently operating LNA. RWS 2013: 217-219

Andrzej Radecki, Hayun Chung, Yoichi Yoshida, Noriyuki Miura, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda: 6 W/25 mm² Wireless Power Transmission for Non-contact Wafer-Level Testing. IEICE Transactions 95-C(4): 668-676 (2012)

Hideo Sakai, Shin-ichi O'Uchi, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Junichi Tsukada, Yuki Ishikawa, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara, Hiroki Ishikuro: High-Frequency Precise Characterization of Intrinsic FinFET Channel. IEICE Transactions 95-C(4): 752-760 (2012)

Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro: A 0.5 V 1.1 MS/sec 6.3 fJ/Conversion-Step SAR-ADC With Tri-Level Comparator in 40 nm CMOS. J. Solid-State Circuits 47(4): 1022-1030 (2012)

Hayun Chung, Hiroki Ishikuro, Tadahiro Kuroda: A 10-Bit 80-MS/s Decision-Select Successive Approximation TDC in 65-nm CMOS. J. Solid-State Circuits 47(5): 1232-1241 (2012)

Andrzej Radecki, Yuxiang Yuan, Noriyuki Miura, Iori Aikawa, Yasuhiro Take, Hiroki Ishikuro, Tadahiro Kuroda: Simultaneous 6-Gb/s Data and 10-mW Power Transmission Using Nested Clover Coils for Noncontact Memory Card. J. Solid-State Circuits 47(10): 2484-2495 (2012)

Hayun Chung, Andrzej Radecki, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: A 0.025-0.45 W 60%-Efficiency Inductive-Coupling Power Transceiver With 5-Bit Dual-Frequency Feedforward Control for Non-Contact Memory Cards. J. Solid-State Circuits 47(10): 2496-2504 (2012)

Kazutoshi Tomita, Ryota Shinoda, Tadahiro Kuroda, Hiroki Ishikuro: 1-W 3.3-16.3-V Boosting Wireless Power Transfer Circuits With Vector Summing Power Controller. J. Solid-State Circuits 47(11): 2576-2585 (2012)

Andrzej Radecki, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: Rotary Coding for Power Reduction and S/N Improvement in Inductive-Coupling Data Communication. J. Solid-State Circuits 47(11): 2643-2653 (2012)

Kiichi Niitsu, Shusuke Kawai, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: A 65fJ/b Inter-Chip Inductive-Coupling Data Transceivers Using Charge-Recycling Technique for Low-Power Inter-Chip Communication in 3-D System Integration. IEEE Trans. VLSI Syst. 20(7): 1285-1294 (2012)

Abul Hasan Johari, Hiroki Ishikuro: 0.6 - 3.6 GHz wideband operation with high phase resolution On-Chip Network Analyzer. APCCAS 2012: 539-542

Atsutake Kosuge, Wataru Mizuhara, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda: A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and Dicode partial-response channel transceivers. CICC 2012: 1-4

Lechang Liu, Hiroki Ishikuro, Tadahiro Kuroda: A 100Mb/s 13.7pJ/bit DC-960MHz band plesiochronous IR-UWB receiver with costas-loop based synchronization scheme in 65nm CMOS. CICC 2012: 1-4

Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro: An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator. ESSCIRC 2012: 381-384

Won-Joo Yun, Shinya Nakano, Wataru Mizuhara, Atsutake Kosuge, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: A 7Gb/s/link non-contact memory module for multi-drop bus system using energy-equipartitioned coupled transmission line. ISSCC 2012: 52-54

Ryota Shinoda, Kazutoshi Tomita, Yuya Hasegawa, Hiroki Ishikuro: Voltage-boosting wireless power delivery system with fast load tracker by ΔΣ-modulated sub-harmonic resonant switching. ISSCC 2012: 288-290

Takayuki Abe, Yuxiang Yuan, Hiroki Ishikuro, Tadahiro Kuroda: A 2Gb/s 150mW UWB direct-conversion coherent transceiver with IQ-switching carrier recovery scheme. ISSCC 2012: 442-444

Takeshi Matsubara, Isamu Hayashi, Abul Hasan Johari, Tadahiro Kuroda, Hiroki Ishikuro: A 0.7V 4.1mW 850Mbps/ch inductive-coupling transceiver with adaptive pulse width controller in 65nm CMOS. RWS 2012: 71-74

Kiichi Niitsu, Yasufumi Sugimori, Yoshinori Kohama, Kenichi Osada, Naohiko Irie, Hiroki Ishikuro, Tadahiro Kuroda: Analysis and Techniques for Mitigating Interference From Power/Signal Lines and to SRAM Circuits in CMOS Inductive-Coupling Link for Low-Power 3-D System Integration. IEEE Trans. VLSI Syst. 19(10): 1902-1907 (2011)

Kiichi Niitsu, Vishwesh V. Kulkarni, Shinmo Kang, Hiroki Ishikuro, Tadahiro Kuroda: A 14-GHz AC-Coupled Clock Distribution Scheme With Phase Averaging Technique Using Single LC-VCO and Distributed Phase Interpolators. IEEE Trans. VLSI Syst. 19(11): 2058-2066 (2011)

Ryota Sekimoto, Akira Shikata, Tadahiro Kuroda, Hiroki Ishikuro: A 40nm 50S/s-8MS/s ultra low voltage SAR ADC with timing optimized asynchronous clock generator. ESSCIRC 2011: 471-474

Andrzej Radecki, Hayun Chung, Yoichi Yoshida, Noriyuki Miura, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda: 6W/25mm² inductive power transfer for non-contact wafer-level testing. ISSCC 2011: 230-232

Tsutomu Takeya, Lan Nan, Shinya Nakano, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: A 12Gb/s non-contact interface with coupled transmission lines. ISSCC 2011: 492-494

Hiroki Ishikuro, Tadahiro Kuroda: Wireless proximity interfaces with a pulse-based inductive coupling technique. IEEE Communications Magazine 48(10): 192-199 (2010)

Vishal V. Kulkarni, Hiroki Ishikuro, Tadahiro Kuroda: A 4-Gbps Quasi-Millimeter-Wave Transmitter in 65 nm CMOS and a Fast Carrier and Symbol Timing Recovery Scheme. IEICE Transactions 93-C(1): 120-127 (2010)

Mitsuko Saito, Yasufumi Sugimori, Yoshinori Kohama, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda: 2 Gb/s 15 pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. J. Solid-State Circuits 45(1): 134-141 (2010)

Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: 47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. IEEE Trans. on Circuits and Systems 57-I(9): 2269-2278 (2010)

Kiichi Niitsu, Yoshinori Kohama, Yasufumi Sugimori, Kazutaka Kasuga, Kenichi Osada, Naohiko Irie, Hiroki Ishikuro, Tadahiro Kuroda: Modeling and Experimental Verification of Misalignment Tolerance in Inductive-Coupling Inter-Chip Link for Low-Power 3-D System Integration. IEEE Trans. VLSI Syst. 18(8): 1238-1243 (2010)

Shusuke Kawai, Hiroki Ishikuro, Tadahiro Kuroda: A 2.5Gb/s/ch 4PAM inductive-coupling transceiver for non-contact memory card. ISSCC 2010: 264-265

Shusuke Kawai, Takayuki Ikari, Yutaka Takikawa, Hiroki Ishikuro, Tadahiro Kuroda: A wireless real-time on-chip bus trace system. ASP-DAC 2009: 91-92

Mitsuko Saito, Yasufumi Sugimori, Yoshinori Kohama, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: 47% power reduction and 91% area reduction in inductive-coupling programmable bus for NAND flash memory stacking. CICC 2009: 449-452

Yasufumi Sugimori, Yoshinori Kohama, Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda: A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking. ISSCC 2009: 244-245

Daisuke Mizoguchi, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: Constant Magnetic Field Scaling in Inductive-Coupling Data Link. IEICE Transactions 91-C(2): 200-205 (2008)

Koichi Ishida, Atit Tamtrakarn, Hiroki Ishikuro, Makoto Takamiya, Takayasu Sakurai: An Outside-Rail Opamp Design Relaxing Low-Voltage Constraint on Future Scaled Transistors. IEICE Transactions 90-C(4): 786-792 (2007)

Toru Tanzawa, Kenichi Agawa, Hiroyuki Shibayama, Ryota Terauchi, Katsumi Hisano, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Toru Takayama, Masayuki Koizumi, Fumitoshi Hatori: A 2.4-GHz Temperature-Compensated CMOS LC-VCO for Low Frequency Drift Low-Power Direct-Modulation GFSK Transmitters. IEICE Transactions 88-C(4): 490-495 (2005)