Ravi R. Iyer

Seung Eun Lee, Yoon Seok Yang, Gwan S. Choi, Wei Wu, Ravi R. Iyer: Low-Power, Resilient Interconnection with Orthogonal Latin Squares. IEEE Design & Test of Computers 28(2): 30-39 (2011)

Asit K. Mishra, Aditya Yanamandra, Reetuparna Das, Soumya Eachempati, Ravi R. Iyer, Narayanan Vijaykrishnan, Chita R. Das: RAFT: A router architecture with frequency tuning for on-chip networks. J. Parallel Distrib. Comput. 71(5): 625-640 (2011)

Zhen Fang, Li Zhao, Ravishankar R. Iyer, Carlos Flores Fajardo, German Fabila Garcia, Seung Eun Lee, Bin Li, Steve R. King, Xiaowei Jiang, Srihari Makineni: Cost-effectively offering private buffers in SoCs and CMPs. ICS 2011: 275-284

Bill Lin, Jeffrey C. Mogul, Ravishankar R. Iyer (Eds.): Proceedings of the 2010 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2010, San Diego, California, USA, October 25-26, 2010. ACM 2010, isbn 978-1-4503-0379-8

Kyungtae Han, Zhen Fang, Paul Diefenbaugh, Richard Forand, Ravi R. Iyer, Donald Newell: Using checksum to reduce power consumption of display systems for low-motion content. ICCD 2009: 47-53

Andrew Herdrich, Ramesh Illikkal, Ravi R. Iyer, Donald Newell, Vineet Chadha, Jaideep Moses: Rate-based QoS techniques for cache/memory in CMP platforms. ICS 2009: 479-488

Jaideep Moses, Konstantinos Aisopos, Aamer Jaleel, Ravi R. Iyer, Ramesh Illikkal, Donald Newell, Srihari Makineni: CMPSched$im: Evaluating OS/CMP interaction on shared cache management. ISPASS 2009: 113-122

Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar R. Iyer, Narayanan Vijaykrishnan, Chita R. Das: A case for dynamic frequency tuning in on-chip networks. MICRO 2009: 292-303

Tao Wang, Qigang Wang, Dong Liu, Michael Liao, Kevin Wang, Lu Cao, Li Zhao, Ravi R. Iyer, Ramesh Illikkal, John Du, Liang Wang: Hardware/Software Co-Simulation for Last Level Cache Exploration. NAS 2009: 371-378

Priya Govindarajan, Srihari Makineni, Donald Newell, Ravi R. Iyer, Ram Huggahalli, Amit Kumar: Achieving 10Gbps Network Processing: Are We There Yet?. HiPC 2008: 518-528

Reetuparna Das, Asit K. Mishra, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Ravishankar R. Iyer, Mazin S. Yousif, Chita R. Das: Performance and power optimization through data compression in Network-on-Chip architectures. HPCA 2008: 215-225

Padma Apparao, Ravi R. Iyer, Donald Newell: Implications of cache asymmetry on server consolidation performance. IISWC 2008: 24-32

Padma Apparao, Ravi R. Iyer, Xiaomin Zhang, Donald Newell, Tom Adelmeyer: Characterization & analysis of a server consolidation benchmark. VEE 2008: 21-30

Li Zhao, Ravi R. Iyer, Jaideep Moses, Ramesh Illikkal, Srihari Makineni, Donald Newell: Exploring Large-Scale CMP Architectures Using ManySim. IEEE Micro 27(4): 21-33 (2007)

Li Zhao, Laxmi N. Bhuyan, Ravi R. Iyer, Srihari Makineni, Donald Newell: Hardware Support for Accelerating Data Movement in Server Platform. IEEE Trans. Computers 56(6): 740-753 (2007)

Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Jaideep Moses, Srihari Makineni, Donald Newell: CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP Platforms. PACT 2007: 339-352

Omesh Tickoo, Hari Kannan, Vineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Donald Newell: qTLB: Looking Inside the Look-Aside Buffer. HiPC 2007: 107-118

Li Zhao, Ravi R. Iyer, Srihari Makineni, Ramesh Illikkal, Jaideep Moses, Donald Newell: Constraint-Aware Large-Scale CMP Cache Design. HiPC 2007: 161-171

Dongkook Park, Reetuparna Das, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Ravishankar R. Iyer, Chita R. Das: Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects. Hot Interconnects 2007: 15-20

Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Donald Newell: Exploring DRAM cache architectures for CMP server platforms. ICCD 2007: 55-62

Seongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer, Li Zhao, W. Cohen: Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance. ISPASS 2007: 1-11

Wenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du: Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation. ISPASS 2007: 35-43

Ravi R. Iyer, Li Zhao, Fei Guo, Ramesh Illikkal, Srihari Makineni, Donald Newell, Yan Solihin, Lisa R. Hsu, Steven K. Reinhardt: QoS policies and architecture for cache/memory in CMP platforms. SIGMETRICS 2007: 25-36

Vineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Jaideep Moses, Donald Newell, Renato J. O. Figueiredo: I/O processing in a virtualized platform: a simulation-driven approach. VEE 2007: 116-125

Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravi R. Iyer: A Network Processor-Based, Content-Aware Switch. IEEE Micro 26(3): 72-84 (2006)

Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. Iyer, Srihari Makineni: Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource. PACT 2006: 13-22

Srihari Makineni, Ravishankar R. Iyer, Partha Sarangam, Donald Newell, Li Zhao, Ramesh Illikkal, Jaideep Moses: Receive Side Coalescing for Accelerating TCP/IP Processing. HiPC 2006: 289-300

Ravi R. Iyer, Mahesh Bhat, Li Zhao, Ramesh Illikkal, Srihari Makineni, Michael Jones, Kumar Shiv, Donald Newell: Exploring Small-Scale and Large-Scale CMP Architectures for Commercial Java Servers. IISWC 2006: 191-200

Padma Apparao, Ravi R. Iyer, Donald Newell: Architectural Characterization of VM Scaling on an SMP Machine. ISPA Workshops 2006: 464-473

Keshavan Varadarajan, S. K. Nandy, Vishal Sharda, Bharadwaj Amrutur, Ravi R. Iyer, Srihari Makineni, Donald Newell: Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions. MICRO 2006: 433-442

Ravi R. Iyer, Jack Perdue, Lawrence Rauchwerger, Nancy M. Amato, Laxmi N. Bhuyan: An Experimental Evaluation of the HP V-Class and SGI Origin 2000 Multiprocessors using Microbenchmarks and Scientific Applications. International Journal of Parallel Programming 33(4): 307-350 (2005)

Lisa R. Hsu, Ravishankar R. Iyer, Srihari Makineni, Steven K. Reinhardt, Donald Newell: Exploring the cache design space for large scale CMPs. SIGARCH Computer Architecture News 33(4): 24-33 (2005)

Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravi R. Iyer: SpliceNP: a TCP splicer using a network processor. ANCS 2005: 135-143

Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravishankar R. Iyer: Design and Implementation of a Content-Aware Switch Using a Network Processor. Hot Interconnects 2005: 79-85

Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. Bhuyan, Donald Newell: Hardware Support for Bulk Data Movement in Server Platforms. ICCD 2005: 53-60

Ram Huggahalli, Ravi R. Iyer, Scott Tetrick: Direct Cache Access for High Bandwidth Network I/O. ISCA 2005: 50-59

Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. Bhuyan: Anatomy and Performance of SSL Processing. ISPASS 2005: 197-206

Greg J. Regnier, Srihari Makineni, Ramesh Illikkal, Ravi R. Iyer, Dave B. Minturn, Ram Huggahalli, Donald Newell, Linda S. Cline, Annie Foong: TCP Onloading for Data Center Servers. IEEE Computer 37(11): 48-58 (2004)

Ravi R. Iyer: Characterization and Evaluation of Cache Hierarchies for Web Servers. World Wide Web 7(3): 259-280 (2004)

Srihari Makineni, Ravi R. Iyer: Architectural Characterization of TCP/IP Packet Processing on the Pentium M Microprocessor. HPCA 2004: 152-163

Padma Apparao, Ravi R. Iyer, Ricardo Morin, Naren Nayak, Mahesh Bhat, David Halliwell, William Steinberg: Architectural Characterization of an XML-Centric Commercial Server Workload. ICPP 2004: 292-300

Ravi R. Iyer: CQoS: a framework for enabling QoS in shared caches of CMP platforms. ICS 2004: 257-266

Jaideep Moses, Ramesh Illikkal, Ravi R. Iyer, Ram Huggahalli, Donald Newell: ASPEN: Towards Effective Simulation of Threads and Engines in Evolving Platforms. MASCOTS 2004: 51-58

Ravi R. Iyer: On Modeling and Analyzing Cache Hierarchies using CASPER. MASCOTS 2003: 182-187

Ravishankar R. Iyer, Hu-Jun Wang, Laxmi N. Bhuyan: Design and analysis of static memory management policies for CC-NUMA multiprocessors. Journal of Systems Architecture 48(1-3): 59-80 (2002)

Rong Yu, Laxmi N. Bhuyan, Ravi R. Iyer: Comparing the Memory System Performance of DSS Workloads on the HP V-Class and SGI Origin 2000. IPDPS 2002

Ravi R. Iyer: Exploring the Cache Design Space for Web Servers. IPDPS 2001: 67

Ravi R. Iyer, Laxmi N. Bhuyan: Design and Evaluation of a Switch Cache Architecture for CC-NUMA Multiprocessors. IEEE Trans. Computers 49(8): 779-797 (2000)

Laxmi N. Bhuyan, Ravi R. Iyer, Hu-Jun Wang, Akhilesh Kumar: Impact of CC-NUMA Memory Management Policies on the Application Performance of Multistage Switching Networks. IEEE Trans. Parallel Distrib. Syst. 11(3): 230-246 (2000)

Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda: Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors. IPDPS 2000: 721-728

Ravi R. Iyer, Laxmi N. Bhuyan: Switch Cache: A Framework for Improving the Remote Memory Access Latency of CC-NUMA Multiprocessors. HPCA 1999: 152-160

Ravi R. Iyer, Nancy M. Amato, Lawrence Rauchwerger, Laxmi N. Bhuyan: Comparing the memory system performance of the HP V-class and SGI Origin 2000 multiprocessors using microbenchmarks and scientific applications. International Conference on Supercomputing 1999: 339-347

Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhilesh Kumar: Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors. IPPS/SPDP 1998: 466-474

Laxmi N. Bhuyan, Ravi R. Iyer, Tahsin Askar, Ashwini K. Nanda, Mohan Kumar: Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor. IEEE Trans. Parallel Distrib. Syst. 8(1): 82-95 (1997)