Lech Józwiak

Yahya Jan, Lech Józwiak: Scalable communication architectures for massively parallel hardware multi-processors. J. Parallel Distrib. Comput. 72(11): 1450-1463 (2012)

Yahya Jan, Lech Józwiak: Communication and Memory Architecture Design of Application-Specific High-End Multiprocessors. VLSI Design 2012 (2012)

Roel Jordans, Rosilde Corvino, Lech Józwiak: Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW Processors. DSD 2012: 152-155

Lech Józwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo: ASAM: Automatic Architecture Synthesis and Application Mapping. DSD 2012: 216-225

Rosilde Corvino, Erkan Diken, Abdoulaye Gamatié, Lech Józwiak: Transformation-Based Exploration of Data Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study. DSD 2012: 774-781

Rosilde Corvino, Abdoulaye Gamatié, Marc Geilen, Lech Józwiak: Design space exploration in application-specific hardware synthesis for multiple communicating nested loops. ICSAMOS 2012: 128-135

Alexandre Solon Nery, Lech Józwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. França: Hardware Reuse in Modern Application-Specific Processors and Accelerators. DSD 2011: 140-147

Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak: A Parallel Ray Tracing Architecture Suitable for Application-Specific Hardware and GPGPU Implementations. DSD 2011: 511-518

Michal Bryk, Lech Józwiak, Wieslaw Kuzmicz: Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits. DSD 2011: 685-692

Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak: Massively Parallel Identification of Intersection Points for GPGPU Ray Tracing. ICA3PP (2) 2011: 14-23

Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França, Lech Józwiak: A parallel architecture for ray-tracing with an embedded intersection algorithm. ISCAS 2011: 1491-1494

Lech Józwiak, Menno Lindwer: Issues and Challenges in Development of Massively-Parallel Heterogeneous MPSoCs Based on Adaptable ASIPs. PDP 2011: 483-487

Lech Józwiak: Advanced Architectures for Highly-demanding Embedded and Pervasive Applications. PECCS 2011: 09-014

Lech Józwiak, Nadia Nedjah, Miguel Figueroa: Modern development methods and tools for embedded reconfigurable systems: A survey. Integration 43(1): 1-33 (2010)

Lech Józwiak, Yahya Jan: Quality-driven methodology for demanding accelerator design. ISQED 2010: 380-389

Lech Józwiak, Yahya Jan: Architecture Design of Reconfigurable Accelerators for Demanding Applications. ITNG 2010: 1201-1206

Lech Józwiak: Quality-driven SoC architecture synthesis for embedded applications. SoCC 2010: 425-426

Lech Józwiak, Nadia Nedjah: Modern Architectures for Embedded Reconfigurable Systems - a Survey. Journal of Circuits, Systems, and Computers 18(2): 209-254 (2009)

Yahya Jan, Lech Józwiak: Survey of Advanced CABAC Accelerator Architectures for Future Multimedia. ARC 2009: 342-348

Yahya Jan, Lech Józwiak: CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey. SAMOS 2009: 24-35

Venkatesan Muthukumar, Lech Józwiak: Editorial. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 347-348 (2008)

Lech Józwiak, Sien-An Ong: Quality-driven model-based architecture synthesis for real-time embedded SoCs. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 349-368 (2008)

Lech Józwiak, Szymon Bieganski: Technology Library Modelling for Information-driven Circuit Synthesis. DSD 2008: 480-489

Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk: High-Quality Circuit Synthesis for Modern Technologies. ISQED 2008: 168-173

Lech Józwiak, Alexander Douglas: Hardware Synthesis for Reconfigurable Heterogeneous Pipelined Accelerators. ITNG 2008: 1123-1130

Srikanth Venkataraman, Nagesh Nagapalli, Lech Józwiak: Quality Driven Manufacturing and SOC Designs. ISQED 2007: 5

Lech Józwiak: Quality-Driven Architecture Synthesis and Power Aware Design of Embedded SoCs. ISQED 2007: 6

Lech Józwiak: Life-Inspired Systems and Their Quality-Driven Design. ARCS 2006: 1-16

Lech Józwiak, Aleksander Slusarczyk, Dominik Gawlowski: Multi-objective Optimal FSM State Assignment. DSD 2006: 385-396

Lech Józwiak, Sien-An Ong: Quality-Driven Template-Based Architecture Synthesis for Real-time Embedded SoCs. DSD 2006: 397-406

Lech Józwiak, Dominik Gawlowski, Aleksander Slusarczyk: Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems. ICSAMOS 2006: 177-184

Henry Selvaraj, Lech Józwiak: Reconfigurable embedded systems: Synthesis, design and application. Journal of Systems Architecture 51(6-7): 347-349 (2005)

Lech Józwiak, Szymon Bieganski, Artur Chojnacki: Information-driven circuit synthesis with the pre-characterized gate libraries. Journal of Systems Architecture 51(6-7): 405-423 (2005)

Lech Józwiak, Szymon Bieganski: High-quality Sub-function Construction in the Information-driven Circuit Synthesis with Gates. DSD 2005: 450-459

Lech Józwiak, Kaustav Banerjee: Plenary Session 2P. ISQED 2005: 461

Lech Józwiak: Life-Inspired Systems: Assuring Quality in the Era of Complexity, invited. IWSOC 2005: 139-142

Lech Józwiak, Aleksander Slusarczyk: General decomposition of incompletely specified sequential machines with multi-state behavior realization. Journal of Systems Architecture 50(8): 445-492 (2004)

Lech Józwiak: Life-Inspired Systems. DSD 2004: 36-43

Lech Józwiak, Dominik Gawlowski, Aleksander Slusarczyk: An Effective Solution of Benchmarking Problem FSM Benchmark Generator and Its Application to Analysis of State Assignment Methods. DSD 2004: 160-167

Lech Józwiak, Szymon Bieganski: Information Trans-Coders in Information-Driven Circuit Synthesis. DSD 2004: 288-397

Lech Józwiak: Advanced AI Search Techniques in Modern Digital Circuit Synthesis. Artif. Intell. Rev. 20(3-4): 269-318 (2003)

Martyn Edwards, Lech Józwiak: Special-issue on reconfigurable systems. Journal of Systems Architecture 49(4-6): 123-125 (2003)

Lech Józwiak, Aleksander Slusarczyk, Artur Chojnacki: Fast and compact sequential circuits for the FPGA-based reconfigurable systems. Journal of Systems Architecture 49(4-6): 227-246 (2003)

Lech Józwiak, Artur Chojnacki: Effective and efficient FPGA synthesis through general functional decomposition. Journal of Systems Architecture 49(4-6): 247-265 (2003)

Martyn Edwards, Lech Józwiak: Preface. Journal of Systems Architecture 49(12-15): 485-487 (2003)

Lech Józwiak, Szymon Bieganski, Artur Chojnacki: Information-driven Library-based Circuit Synthesis. DSD 2003: 148-157

Lech Józwiak, Adam Postula: Genetic engineering versus natural evolution: Genetic algorithms with deterministic operators. Journal of Systems Architecture 48(1-3): 99-112 (2002)

Marek A. Perkowski, David Foote, Qihong Chen, Anas Al-Rabadi, Lech Józwiak: Learning Hardware Using Multiple-Valued Logic, Part 1: Introduction and Approach. IEEE Micro 22(3): 41-51 (2002)

Marek A. Perkowski, David Foote, Qihong Chen, Anas Al-Rabadi, Lech Józwiak: Learning Hardware Using Multiple-Valued Logic, Part 2: Cube Calculus and Architecture. IEEE Micro 22(3): 52-61 (2002)

Aleksander Slusarczyk, Lech Józwiak: Interoperability and Quality of New EDA Tools for Sequential Logic Synthesis. ISQED 2002: 87-

Marek A. Perkowski, Lech Józwiak, W. Zhao: Symbolic two-dimensional minimization of strongly unspecified finite state machines. Journal of Systems Architecture 47(1): 15-28 (2001)

Mariusz Rawski, Lech Józwiak, Tadeusz Luba: Functional decomposition with an efficient input support selection for sub-functions based on information relationship measures. Journal of Systems Architecture 47(2): 137-155 (2001)

Lech Józwiak: Modern methods and tools in digital system design. Journal of Systems Architecture 47(3-4): 197-200 (2001)

Lech Józwiak: Quality-driven design in the system-on-a-chip era: Why and how? Journal of Systems Architecture 47(3-4): 201-224 (2001)

Lech Józwiak, Artur Chojnacki: High-quality sub-function construction in functional decomposition based on information relationship measures. DATE 2001: 383-390

Lech Józwiak, Artur Chojnacki: Effective and Efficient FPGA Synthesis through Functional Decomposition Based on Information Relationship Measures. DSD 2001: 30-37

Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk: Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis. DSD 2001: 46-53

Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Bart Massey, Pawel Kerntopf, Andrzej Buller, Lech Józwiak, Alan J. Coppola: Regular Realization of Symmetric Functions Using Reversible Logic. DSD 2001: 245-253

Artur Chojnacki, Lech Józwiak: High-quality FPGA Designs through Functional Decomposition with Sub-function Input Support Selection Based on Information Relationship Measures. ISQED 2001: 409-414

Lech Józwiak, Aleksander Slusarczyk: A New State Assignment Method Targeting FPGA Implementations. EUROMICRO 2000: 1050-1059

Artur Chojnacki, Lech Józwiak: Multi-Valued Sub-Function Encoding in Functional Decomposition Based on Information Relationships Measures. ISMVL 2000: 83-90

Lech Józwiak: Quality-Driven System-on-a-Chip Design. ISQED 2000: 93-

Lech Józwiak: Digital System Design: Architectures, Methods and Tools. EUROMICRO 1999: 1004-

Mariusz Rawski, Lech Józwiak, Tadeusz Luba: The Influence of the Number of Values in Sub-Functions on the Effectiveness and Efficiency of the Functional Decomposition. EUROMICRO 1999: 1086-1093

Mariusz Rawski, Lech Józwiak, Tadeusz Luba: Efficient Input Support Selection for Sub-functions in Functional Decomposition Based on Information Relationship Measures. EUROMICRO 1999: 1094-1101

Lech Józwiak, Artur Chojnacki: Functional Decomposition based on Information Relationship Measures Extremely Effective and Efficient for Symmetric Functions. EUROMICRO 1999: 1150-1160

Song Chen, Adam Postula, Lech Józwiak: Synthesis of XOR Storage Schemes with Different Cost for Minimization of Memory Contention. EUROMICRO 1999: 1170-1177

Torrey Lewis, Marek A. Perkowski, Lech Józwiak: Learning in Hardware: Architecture and Implementation of an FPGA-Based Rough Set Machine. EUROMICRO 1999: 1326-1334

Rafal Rzechowski, Tadeusz Luba, Lech Józwiak: Technology Driven Multilevel Logic Synthesis Based on Functional Decomposition into Gates. EUROMICRO 1999: 1368-1375

Lech Józwiak, Adam Postula: Genetic Engineering versus Natural Evolution Genetic Algorithms with Deterministic Operators. IC-AI 1999: 58-64

Lech Józwiak: Information Relationships and Measures in Application to Logic Design. ISMVL 1999: 228-235

Lech Józwiak, Niek Ederveen, Adam Postula: Solving Synthesis Problems with Genetic Algorithms. EUROMICRO 1998: 10001-10007

Mariusz Rawski, Tadeusz Luba, Lech Józwiak, Artur Chojnacki: Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure. EUROMICRO 1998: 10008-10015

Michael Burns, Marek A. Perkowski, Lech Józwiak: An Efficient Approach to Decomposition of Multi-Output Boolean Functions with Large Sets of Bound Variables. EUROMICRO 1998: 10016-10023

Adam Postula, Song Chen, Lech Józwiak, David Abramson: Automated Synthesis of Interleaved Memory Systems for Custom Computing Machine. EUROMICRO 1998: 10115-10122

Loc Bao Nguen, Marek A. Perkowski, Lech Józwiak: Design of Self-Synchronized Component FSMs for Self-Timed Systems. EUROMICRO 1998: 10253-10260

Mariusz Rawski, Lech Józwiak, Artur Chojnacki: Application of the Information Measures to Input Support Selection in Functional Decomposition. Rough Sets and Current Trends in Computing 1998: 573-580

Lech Józwiak: Analysis and Synthesis of Information Systems with Information Relationships and Measures. Rough Sets and Current Trends in Computing 1998: 585-588

Lech Józwiak: Information Relationships and Measures An Analysis Apparatus for Efficient Information System Synthesis. EUROMICRO 1997: 13-23

Sanof Mohamed, Marek A. Perkowski, Lech Józwiak: Fast Minimization Of Multi-Output Boolean Functions In Sum-Of-Condition-Decoders Structures. EUROMICRO 1997: 31-

Lech Józwiak: On the use of term trees for effective and efficient test pattern generation. EUROMICRO 1997: 87-95

Sien-An Ong, Kari Tiensyrjä, Lech Józwiak: Interactive codesign for real-time embedded control systems: task graph generation from SA/VHDL models. EUROMICRO 1997: 172-181

Marek A. Perkowski, Malgorzata Marek-Sadowska, Lech Józwiak, Tadeusz Luba, Stan Grygiel, Miroslawa Nowicka, Rahul Malvi, Zhi Wang, Jin S. Zhang: Decomposition of Multiple-Valued Relations . ISMVL 1997: 13-18

Stan Grygiel, Marek A. Perkowski, Malgorzata Marek-Sadowska, Tadeusz Luba, Lech Józwiak: Cube Diagram Bundles: A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations. ISMVL 1997: 287-292

Lech Józwiak, Sien-An Ong: Quality-Driven Decision Making Methodology for System-Level Design. EUROMICRO 1996: 8-18

Lech Józwiak, Hein Mijland: On the use of OR-BDDs for test generation. Microprocessing and Microprogramming 35(1-5): 159-166 (1992)

Lech Józwiak: Efficent suboptimal state assignment for large sequential machines. EURO-DAC 1990: 536-541