Itai Jaeger

Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan s Marcu, Gil Shurek: Constraint-Based Random Stimuli Generation for Hardware Verification. AI Magazine 28(3): 13-30 (2007)

Shady Copty, Itai Jaeger, Yoav Katz, Michael Vinov: Intelligent Interleaving of Scenarios: A Novel Approach to System Level Test Generation. DAC 2007: 891-895

Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jaeger, Ofer Peled: A Framework for the Validation of Processor Architecture Compliance. DAC 2007: 902-905

Shai Fine, Ari Freund, Itai Jaeger, Yishay Mansour, Yehuda Naveh, Avi Ziv: Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation. IEEE Trans. Computers 55(11): 1344-1355 (2006)

Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek: Constraint-Based Random Stimuli Generation for Hardware Verification. AAAI 2006: 1720-1727

Michal Rimon, Yossi Lichtenstein, Allon Adir, Itai Jaeger, Michael Vinov, S. Johnson, D. Jani: Addressing Test Generation Challenges for Configurable Processor Verification. HLDVT 2006: 95-101

Yoav Katz, Itai Jaeger, Roy Emek, Yossi Lichtenstein, Anita Devadason, Audrey Romonosky: Reuse in system-level stimuli-generation. HLDVT 2005: 105-111

Shai Fine, Ari Freund, Itai Jaeger, Yehuda Naveh, Avi Ziv, Yishay Mansour: Harnessing machine learning to improve the success rate of stimuli generation. HLDVT 2005: 112-118

Shady Copty, Itai Jaeger, Yoav Katz: Path-Based System Level Stimuli Generation. Haifa Verification Conference 2005: 1-13

Roy Emek, Itai Jaeger, Yoav Katz, Yehuda Naveh: Quality Improvement Methods for System-Level Stimuli Generation. ICCD 2004: 204-206

Roy Emek, Itai Jaeger, Yehuda Naveh, Gadi Bergman, Guy Aloni, Yoav Katz, Monica Farkash, Igor Dozoretz, Alex Goldin: X-Gen: a random test-case generator for systems and SoCs. HLDVT 2002: 145-150