| 2013 | ||
|---|---|---|
| j8 | Ashutosh Datar, Alok Jain, Pramod Chandra Sharma: Design and performance analysis of adjustable window functions based cosine modulated filter banks. Digital Signal Processing 23(1): 412-417 (2013) | |
| 2012 | ||
| c13 | Preety D. Swami, Alok Jain: Adaptive Fusion Based Hybrid Denoising Method for Texture Images. ACITY (2) 2012: 699-707 | |
| 2011 | ||
| j7 | Ram Kumar Soni, Alok Jain, Rajiv Saxena: An optimized transmultiplexer using combinational window functions. Signal, Image and Video Processing 5(3): 389-397 (2011) | |
| c12 | B. A. Krishna, Jonathan Michelson, Vigyan Singhal, Alok Jain: Liveness vs Safety - A Practical Viewpoint. Haifa Verification Conference 2011: 80-94 | |
| c11 | Vidhi Rawat, Alok Jain, Vibhakar Shrimali: Analysis and Assessment of Ultrasound Images for Fetal Biometry Using Morphological Operators. IICAI 2011: 1271-1279 | |
| 2010 | ||
| j6 | Ram Kumar Soni, Alok Jain, Rajiv Saxena: An improved and simplified design of pseudo-transmultiplexer using Blackman window family. Digital Signal Processing 20(3): 743-749 (2010) | |
| j5 | Ram Kumar Soni, Alok Jain, Rajiv Saxena: Design of NPR-Type Cosine Modulated Filterbank Using Combinational Window Functions. IJCNS 3(12): 934-942 (2010) | |
| j4 | Ram Kumar Soni, Alok Jain, Rajiv Saxena: Design of M-Band NPR Cosine-Modulated Filterbank Using IFIR Technique. J. Signal and Information Processing 1(1): 35-43 (2010) | |
| j3 | Ashutosh Datar, Alok Jain, Pramod Chandra Sharma: Design of Kaiser window based optimized prototype filter for cosine modulated filter banks. Signal Processing 90(5): 1742-1749 (2010) | |
| c10 | B. A. Krishna, Anamaya Sullerey, Alok Jain: Formal verification of an ASIC ethernet switch block. FMCAD 2010: 13-20 | |
| i1 | Vidhi Rawat, Alok Jain, Vibhakar Shrimali: Investigation and Assessment of Disorder of Ultrasound B-mode Images. CoRR abs/1003.1827 (2010) | |
| 2007 | ||
| c9 | Praveen Tiwari, Raj S. Mitra, Manu Chopra, Alok Jain: Tutorial T4B: Formal Assertion-Based Verification in Industrial Setting. VLSI Design 2007: 7 | |
| 2006 | ||
| j2 | Alok Jain, Rajiv Saxena, S. C. Saxena: An improved and simplified design of cosine-modulated pseudo-QMF filterbanks. Digital Signal Processing 16(3): 225-232 (2006) | |
| j1 | Alok Jain, Rajiv Saxena, S. C. Saxena: Anti-image FIR filters for large interpolation factors. Signal Processing 86(11): 3240-3245 (2006) | |
| 1999 | ||
| c8 | Vishnu A. Patankar, Alok Jain, Randal E. Bryant: Formal Verification of an ARM Processor. VLSI Design 1999: 282-287 | |
| 1997 | ||
| c7 | Miroslav N. Velev, Randal E. Bryant, Alok Jain: Efficient Modeling of Memory Arrays in Symbolic Simulation. CAV 1997: 388-399 | |
| c6 | Kyle L. Nelson, Alok Jain, Randal E. Bryant: Formal Verification of a Superscalar Execution Unit. DAC 1997: 161-166 | |
| 1996 | ||
| c5 | Alok Jain, Kyle L. Nelson, Randal E. Bryant: Verifying Nondeterministic Implementations of Deterministic Systems. FMCAD 1996: 109-125 | |
| 1995 | ||
| c4 | Samir Jain, Randal E. Bryant, Alok Jain: Automatic Clock Abstraction from Sequential Circuits. DAC 1995: 707-711 | |
| c3 | Manish Pandey, Alok Jain, Randal E. Bryant, Derek L. Beatty, Gary York, Samir Jain: Extraction of finite state machines from transistor netlists by symbolic simulation. ICCD 1995: 596-601 | |
| 1993 | ||
| c2 | Alok Jain, Randal E. Bryant: Inverter minimization in multi-level logic networks. ICCAD 1993: 462-465 | |
| 1991 | ||
| c1 | Alok Jain, Randal E. Bryant: Mapping Switch-Level Simulation onto Gate-Level Hardware Accelerators. DAC 1991: 219-222 | |
Colors in the list of coauthors
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