Shailendra Jain

Gregory Ruhl, Saurabh Dighe, Shailendra Jain, Surhud Khare, Sriram R. Vangal: IA-32 Processor with a Wide-Voltage-Operating Range in 32-nm CMOS. IEEE Micro 33(2): 28-36 (2013)

Surhud Khare, Shailendra Jain: Prospects of Near-Threshold Voltage Design for Green Computing. VLSI Design 2013: 120-124

Shailendra Jain, Surhud Khare, Satish Yada, V. Ambili, Praveen Salihundam, Shiva Ramani, Sriram Muthukumar, M. Srinivasan, Arun Kumar, Shasi Kumar, Rajaraman Ramanarayanan, Vasantha Erraguntla, Jason Howard, Sriram R. Vangal, Saurabh Dighe, Gregory Ruhl, Paolo A. Aseron, Howard Wilson, Nitin Borkar, Vivek De, Shekhar Borkar: A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS. ISSCC 2012: 66-68

Praveen Salihundam, Mohammed Asadullah Khan, Shailendra Jain, Yatin Hoskote, Satish Yada, Shasi Kumar, Vasantha Erraguntla, Sriram R. Vangal, Nitin Borkar: A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip. VLSI Design 2012: 292-297

Jason Howard, Saurabh Dighe, Sriram R. Vangal, Gregory Ruhl, Nitin Borkar, Shailendra Jain, Vasantha Erraguntla, Michael Konow, Michael Riepen, Matthias Gries, Guido Droege, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek K. De, Rob F. Van der Wijngaart: A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling. J. Solid-State Circuits 46(1): 173-183 (2011)

Praveen Salihundam, Shailendra Jain, Tiju Jacob, Shasi Kumar, Vasantha Erraguntla, Yatin Hoskote, Sriram R. Vangal, Gregory Ruhl, Nitin Borkar: A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS. J. Solid-State Circuits 46(4): 757-766 (2011)

Julie Ward, Bin Zhang, Shailendra Jain, Chris Fry, Thomas Olavson, Holger Mishal, Jason Amaral, Dirk Beyer, Ann Brecht, Brian Cargille, Russ Chadinha, Kathy Chou, Gavin DeNyse, Qi Feng, Cookie Padovani, Sesh Raj, Kurt Sunderbruch, Robert Endre Tarjan, Krishna Venkatraman, Joseph Woods, Jing Zhou: HP Transforms Product Portfolio Management with Operations Research. Interfaces 40(1): 17-32 (2010)

Jason Howard, Saurabh Dighe, Yatin Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson: A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. ISSCC 2010: 108-109

Shailendra Jain, Vasantha Erraguntla, Sriram R. Vangal, Yatin Hoskote, Nitin Borkar, Tulasi Mandepudi, V. P. Karthik: A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm. VLSI Design 2010: 252-257

Priya Iyer, Shailendra Jain, Bryan Casper, Jason Howard: Testing High-Speed IO Links Using On-Die Circuitry. VLSI Design 2006: 807-810

Shailendra Jain, Mark Hayward, Sharad Kumar: Broadband infrastructure - the ultimate guide to building and delivering OSS / BSS from BusinessEdge Solutions (2. ed.). Kluwer 2003, isbn 978-1-4020-7378-6, pp. I-XV, 1-282