| 2012 | ||
|---|---|---|
| j6 | Leonid Domnitser, Aamer Jaleel, Jason Loew, Nael B. Abu-Ghazaleh, Dmitry Ponomarev: Non-monopolizable caches: Low-complexity mitigation of cache side channel attacks. TACO 8(4): 35 (2012) | |
| j5 | William Hasenplaugh, Pritpal S. Ahuja, Aamer Jaleel, Simon C. Steely Jr., Joel S. Emer: The gradient-based cache partitioning algorithm. TACO 8(4): 44 (2012) | |
| c21 | Aamer Jaleel, Hashem Hashemi Najaf-abadi, Samantika Subramaniam, Simon C. Steely Jr., Joel S. Emer: CRUISE: cache replacement and utility-aware scheduling. ASPLOS 2012: 249-260 | |
| c20 | Kenzo Van Craeynest, Aamer Jaleel, Lieven Eeckhout, Paolo Narváez, Joel S. Emer: Scheduling heterogeneous multi-cores through performance impact estimation (PIE). ISCA 2012: 213-224 | |
| c19 | Binh Pham, Viswanathan Vaidyanathan, Aamer Jaleel, Abhishek Bhattacharjee: CoLT: Coalesced Large-Reach TLBs. MICRO 2012: 258-269 | |
| 2011 | ||
| c18 | Carole-Jean Wu, Aamer Jaleel, William Hasenplaugh, Margaret Martonosi, Simon C. Steely Jr., Joel S. Emer: SHiP: signature-based hit predictor for high performance caching. MICRO 2011: 430-441 | |
| c17 | Carole-Jean Wu, Aamer Jaleel, Margaret Martonosi, Simon C. Steely Jr., Joel S. Emer: PACMan: prefetch-aware cache management for high performance caching. MICRO 2011: 442-453 | |
| 2010 | ||
| j4 | Moshe Bach, Mark Charney, Robert Cohn, Elena Demikhovsky, Tevi Devor, Kim M. Hazelwood, Aamer Jaleel, Chi-Keung Luk, Gail Lyons, Harish Patil, Ady Tal: Analyzing Parallel Programs with Pin. IEEE Computer 43(3): 34-41 (2010) | |
| c16 | Arijit Biswas, Charles Recchia, Shubhendu S. Mukherjee, Vinod Ambrose, Leo Chan, Aamer Jaleel, Athanasios E. Papathanasiou, Mike Plaster, Norbert Seifert: Explaining cache SER anomaly using DUE AVF measurement. HPCA 2010: 1-12 | |
| c15 | Aamer Jaleel, Kevin B. Theobald, Simon C. Steely Jr., Joel S. Emer: High performance cache replacement using re-reference interval prediction (RRIP). ISCA 2010: 60-71 | |
| c14 | Aamer Jaleel, Eric Borch, Malini Bhandaru, Simon C. Steely Jr., Joel S. Emer: Achieving Non-Inclusive Cache Performance with Inclusive Caches: Temporal Locality Aware (TLA) Cache Management Policies. MICRO 2010: 151-162 | |
| 2009 | ||
| c13 | Jaideep Moses, Konstantinos Aisopos, Aamer Jaleel, Ravi R. Iyer, Ramesh Illikkal, Donald Newell, Srihari Makineni: CMPSched$im: Evaluating OS/CMP interaction on shared cache management. ISPASS 2009: 113-122 | |
| c12 | Junmin Lin, Yu Chen, Wenlong Li, Aamer Jaleel, Zhizhong Tang: Understanding the Memory Behavior of Emerging Multi-core Workloads. ISPDC 2009: 153-160 | |
| 2008 | ||
| j3 | Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely Jr., Joel S. Emer: Set-Dueling-Controlled Adaptive Insertion for High-Performance Caching. IEEE Micro 28(1): 91-98 (2008) | |
| c11 | Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qureshi, Julien Sebot, Simon C. Steely Jr., Joel S. Emer: Adaptive insertion policies for managing shared caches. PACT 2008: 208-219 | |
| c10 | Yu Chen, Wenlong Li, Junmin Lin, Aamer Jaleel, Zhizhong Tang: Data Sharing Analysis of Emerging Parallel Media Mining Workloads. HiPC 2008: 87-96 | |
| 2007 | ||
| c9 | Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob: Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling. HPCA 2007: 109-120 | |
| c8 | Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely Jr., Joel S. Emer: Adaptive insertion policies for high performance caching. ISCA 2007: 381-391 | |
| c7 | Wenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du: Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation. ISPASS 2007: 35-43 | |
| c6 | Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jaleel, Greg Hamerly, Brad Calder: Cross Binary Simulation Points. ISPASS 2007: 179-189 | |
| 2006 | ||
| j2 | Aamer Jaleel, Bruce L. Jacob: In-Line Interrupt Handling and Lock-Up Free Translation Lookaside Buffers (TLBs). IEEE Trans. Computers 55(5): 559-574 (2006) | |
| c5 | Aamer Jaleel, Matthew Mattina, Bruce L. Jacob: Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads. HPCA 2006: 88-98 | |
| 2005 | ||
| j1 | David Wang, Brinda Ganesh, Nuengwong Tuaycharoen, Kathleen Baynes, Aamer Jaleel, Bruce L. Jacob: DRAMsim: a memory system simulator. SIGARCH Computer Architecture News 33(4): 100-107 (2005) | |
| c4 | Aamer Jaleel, Bruce L. Jacob: Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions. HPCA 2005: 191-200 | |
| c3 | Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung: BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS 2005: 2-9 | |
| 2001 | ||
| c2 | Aamer Jaleel, Bruce L. Jacob: Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss Handlers. HiPC 2001: 282-293 | |
| c1 | Aamer Jaleel, Bruce L. Jacob: In-Line Interrupt Handling for Software-Managed TLBs. ICCD 2001: 62-67 | |
Colors in the list of coauthors
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