Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Chang-Soo Jang
2010 – today
- 2011
[j3]Jae-Young Park, Dae-Woo Kim, Young-Sang Son, Jong-Kyu Song, Chang-Soo Jang, Won-Young Jung: A Non-snapback ESD Protection Clamp Circuit Using Isolated Parasitic Capacitance in a 0.35 µm Bipolar-CMOS-DMOS Process. IEICE Transactions 94-C(5): 796-801 (2011)- 2010
[j2]Jae-Young Park, Jong-Kyu Song, Dae-Woo Kim, Chang-Soo Jang, Won-Young Jung, Taek-Soo Kim: On-Chip Charged Device Model ESD Protection Design Method Using Very Fast Transmission Line Pulse System for RF ICs. IEICE Transactions 93-C(5): 625-630 (2010)
[c1]Jae-Young Park, Jong-Kyu Song, Chang-Soo Jang, Young-Sang Son, Dae-Woo Kim: Analysis and modeling of a Low Voltage Triggered SCR ESD protection clamp with the very fast Transmission Line Pulse measurement. ISQED 2010: 206-210
2000 – 2009
- 2009
[j1]Jae-Young Park, Jong-Kyu Song, Chang-Soo Jang, San-Hong Kim, Won-Young Jung, Taek-Soo Kim: A Latchup-Free ESD Power Clamp Circuit with Stacked-Bipolar Devices for High-Voltage Integrated Circuits. IEICE Transactions 92-C(5): 671-675 (2009)
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2012-12-02 22:16 CET by the dblp team



