| 2013 | ||
|---|---|---|
| j7 | Ji-Hun Eo, Yeon-Ho Jeong, Young-Chan Jang: An 8-Bit 100-kS/s CMOS Single-Ended SA ADC for 8×8 Point EEG/MEG Acquisition System. IEICE Transactions 96-A(2): 453-458 (2013) | |
| 2012 | ||
| j6 | Hyun Bae Lee, Young-Chan Jang: Mirrored Serpentine Microstrip Lines for Reduction of Far-End Crosstalk. IEICE Transactions 95-C(6): 1086-1088 (2012) | |
| 2011 | ||
| j5 | Young-Chan Jang: A Self-Calibrating Per-Pin Phase Adjuster for Source Synchronous Double Data Rate Signaling in Parallel Interface. IEICE Transactions 94-A(2): 633-638 (2011) | |
| j4 | Sang-Hun Kim, Yong-Hwan Lee, Hoon-Ju Chung, Young-Chan Jang: A Bootstrapped Analog Switch with Constant On-Resistance. IEICE Transactions 94-C(6): 1069-1071 (2011) | |
| j3 | Ji-Hun Eo, Sang-Hun Kim, Young-Chan Jang: A 1 V 200 kS/s 10-bit Successive Approximation ADC for a Sensor Interface. IEICE Transactions 94-C(11): 1798-1801 (2011) | |
| 2010 | ||
| j2 | Young-Chan Jang: A Swing Level Controlled Transmitter for Single-Ended Signaling with Center-Tapped Termination. IEICE Transactions 93-C(6): 861-863 (2010) | |
| 2007 | ||
| j1 | Young-Chan Jang, Jun-Hyun Bae, Sang-Hune Park, Jae-Yoon Sim, Hong-June Park: An 8.8-GS/s 6-bit CMOS Time-Interleaved Flash Analog-to-Digital Converter with Multi-Phase Clock Generator. IEICE Transactions 90-C(6): 1156-1164 (2007) | |
| 1 | Jun-Hyun Bae | |
| 2 | Hoon-Ju Chung | |
| 3 | Ji-Hun Eo | |
| 4 | Yeon-Ho Jeong | |
| 5 | Sang-Hun Kim | |
| 6 | Hyun Bae Lee | |
| 7 | Yong-Hwan Lee | |
| 8 | Hong-June Park | |
| 9 | Sang-Hune Park | |
| 10 | Jae-Yoon Sim |
Colors in the list of coauthors
Last update Wed May 22 06:14:38 2013 CET by the DBLP Team —
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