| 2011 | ||
|---|---|---|
| c111 | Walid Lafi, Didier Lattard, Ahmed Amine Jerraya: A 3D reconfigurable platform for 4G telecom applications. DATE 2011: 555-558 | |
| 2010 | ||
| c110 | Ahmed Amine Jerraya: Convergence of design and fabrication technologies, a key enabler for HW-SW integration. ASAP 2010: 3 | |
| c109 | Camille Jalier, Didier Lattard, Ahmed Amine Jerraya, Gilles Sassatelli, Pascal Benoit, Lionel Torres: Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem. DATE 2010: 184-189 | |
| c108 | Walid Lafi, Didier Lattard, Ahmed Amine Jerraya: An efficient hierarchical router for large 3D NoCs. International Symposium on Rapid System Prototyping 2010: 1-5 | |
| 2009 | ||
| j40 | Sang-Il Han, Soo-Ik Chae, Lisane B. de Brisolara, Luigi Carro, Katalin Popovici, Xavier Guerin, Ahmed Amine Jerraya, Kai Huang, Lei Li, Xiaolang Yan: Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation. Integration 42(2): 227-245 (2009) | |
| p2 | Katalin Popovici, Wander O. Cesário, Flávio Rech Wagner, Ahmed Amine Jerraya: Hardware/Software Interfaces Design for SoC. Embedded Systems Design and Verification 2009: 16 | |
| c107 | Katalin Popovici, Ahmed Amine Jerraya: Flexible and abstract communication and interconnect modeling for MPSoC. ASP-DAC 2009: 143-148 | |
| c106 | Ahmed Amine Jerraya, Gabriela Nicolescu: Embedded tutorial - Understanding multicore technologies. DATE 2009: 1051 | |
| c105 | Ahmed Amine Jerraya, Rolf Ernst: Panel session - Multicore, will Startups drive innovation? DATE 2009: 1403 | |
| c104 | Walid Lafi, Didier Lattard, Ahmed Amine Jerraya: High level modelling and performance evaluation of address mapping in NAND flash memory. ICECS 2009: 659-662 | |
| 2008 | ||
| j39 | Lobna Kriaa, Aimen Bouchhima, Marius Gligor, Anne-Marie Fouillart, Frédéric Pétrot, Ahmed Amine Jerraya: Parallel Programming of Multi-processor SoC: A HW-SW Interface Perspective. International Journal of Parallel Programming 36(1): 68-92 (2008) | |
| j38 | Wayne Wolf, Ahmed Amine Jerraya, Grant Martin: Multiprocessor System-on-Chip (MPSoC) Technology. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1701-1713 (2008) | |
| j37 | Katalin Popovici, Xavier Guerin, Frédéric Rousseau, Pier Stanislao Paolucci, Ahmed Amine Jerraya: Platform-based software design flow for heterogeneous MPSoC. ACM Trans. Embedded Comput. Syst. 7(4) (2008) | |
| c103 | Pieter J. Mosterman, Don Orofino, Janos Sztipanovits, Ahmed Amine Jerraya, Wido Kruijtzer, Víctor Reyes, Christos G. Cassandras, Grant Martin: Automatically Realising Embedded Systems from High-Level Functional Models. DATE 2008 | |
| c102 | Edson Ifarraguirre Moreno, Katalin Maria Popovici, Ney Laert Vilar Calazans, Ahmed Amine Jerraya: Integrating Abstract NoC Models within MPSoC Design. IEEE International Workshop on Rapid System Prototyping 2008: 65-71 | |
| 2007 | ||
| j36 | Youngchul Cho, Nacer-Eddine Zergainoh, Sungjoo Yoo, Ahmed Amine Jerraya, Kiyoung Choi: Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip. Design Autom. for Emb. Sys. 11(2-3): 167-191 (2007) | |
| j35 | Sang-Il Han, Soo-Ik Chae, Lisane B. de Brisolara, Luigi Carro, Ricardo Reis, Xavier Guerin, Ahmed Amine Jerraya: Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC. Design Autom. for Emb. Sys. 11(4): 249-283 (2007) | |
| j34 | Benaoumeur Senouci, Aimen Bouchhima, Frédéric Rousseau, Frédéric Pétrot, Ahmed Amine Jerraya: Prototyping Multiprocessor System-on-Chip Applications: A Platform-Based Approach. IEEE Distributed Systems Online 8(5) (2007) | |
| j33 | Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne Wolf: Roundtable: Envisioning the Future for Multiprocessor SoC. IEEE Design & Test of Computers 24(2): 174-183 (2007) | |
| j32 | Flávio Rech Wagner, Wander O. Cesário, Ahmed Amine Jerraya: Hardware/software IP integration using the ROSES design environment. ACM Trans. Embedded Comput. Syst. 6(3) (2007) | |
| c101 | Márcio Oyamada, Flávio Rech Wagner, Marius Bonaciu, Wander O. Cesário, Ahmed Amine Jerraya: Software Performance Estimation in MPSoC Design. ASP-DAC 2007: 38-43 | |
| c100 | Patrice Gerin, Hao Shen, A. Chureau, Aimen Bouchhima, Ahmed Amine Jerraya: Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC. ASP-DAC 2007: 390-395 | |
| c99 | Xavier Guerin, Katalin Popovici, Wassim Youssef, Frédéric Rousseau, Ahmed Amine Jerraya: Flexible Application Software Generation for Heterogeneous Multi-Processor System-on-Chip. COMPSAC (1) 2007: 279-286 | |
| c98 | Kai Huang, Sang-Il Han, Katalin Popovici, Lisane B. de Brisolara, Xavier Guerin, Lei Li, Xiaolang Yan, Soo-Ik Chae, Luigi Carro, Ahmed Amine Jerraya: Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264. DAC 2007: 39-42 | |
| c97 | ||
| c96 | Katalin Popovici, Xavier Guerin, Frédéric Rousseau, Pier Stanislao Paolucci, Ahmed Amine Jerraya: Efficient Software Development Platforms for Multimedia Applications at Different Abstraction Levels. IEEE International Workshop on Rapid System Prototyping 2007: 113-122 | |
| c95 | Youngchul Cho, Nacer-Eddine Zergainoh, Kiyoung Choi, Ahmed Amine Jerraya: Low Runtime-Overhead Software Synthesis for Communicating Concurrent Processes. IEEE International Workshop on Rapid System Prototyping 2007: 195-201 | |
| c94 | Youngchul Cho, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya, Kiyoung Choi: Buffer Size Reduction through Control-Flow Decomposition. RTCSA 2007: 183-190 | |
| c93 | Lisane B. de Brisolara, Sang-Il Han, Xavier Guerin, Luigi Carro, Ricardo Reis, Soo-Ik Chae, Ahmed Amine Jerraya: Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. SCOPES 2007: 81-89 | |
| c92 | Katalin Popovici, Ahmed Amine Jerraya: Simulink based hardware-software codesign flow for heterogeneous MPSoC. SCSC 2007: 497-504 | |
| 2006 | ||
| j31 | Nacer-Eddine Zergainoh, Ludovic Tambour, Pascal Urard, Ahmed Amine Jerraya: Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems. EURASIP J. Adv. Sig. Proc. 2006 (2006) | |
| j30 | Ahmed Amine Jerraya, Trevor N. Mudge: Guest editorial: Concurrent hardware and software design for multiprocessor SoC. ACM Trans. Embedded Comput. Syst. 5(2): 259-262 (2006) | |
| j29 | Nacer-Eddine Zergainoh, Ludovic Tambour, Ahmed Amine Jerraya: Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation. IEEE Trans. VLSI Syst. 14(4): 349-360 (2006) | |
| c91 | Marius Bonaciu, Aimen Bouchhima, Mohamed-Wassim Youssef, Xi Chen, Wander O. Cesário, Ahmed Amine Jerraya: High-level architecture exploration for MPEG4 encoder with custom parameters. ASP-DAC 2006: 372-377 | |
| c90 | Sang-Il Han, Soo-Ik Chae, Ahmed Amine Jerraya: Functional modeling techniques for efficient SW code generation of video codec applications. ASP-DAC 2006: 935-940 | |
| c89 | Pier Stanislao Paolucci, Ahmed Amine Jerraya, Rainer Leupers, Lothar Thiele, Piero Vicini: SHAPES: : a tiled scalable software hardware architecture platform for embedded systems. CODES+ISSS 2006: 167-172 | |
| c88 | Ahmed Amine Jerraya, Aimen Bouchhima, Frédéric Pétrot: Programming models and HW-SW interfaces abstraction for multi-processor SoC. DAC 2006: 280-285 | |
| c87 | Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Amine Jerraya: Buffer memory optimization for video codec application modeled in Simulink. DAC 2006: 689-694 | |
| c86 | Florin Dumitrascu, Iuliana Bacivarov, Lorenzo Pieralisi, Marius Bonaciu, Ahmed Amine Jerraya: Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. DATE Designers' Forum 2006: 166-171 | |
| c85 | Benaoumeur Senouci, Aimen Bouchhima, Frédéric Rousseau, Frédéric Pétrot, Ahmed Amine Jerraya: Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture: "Hardware-Dependent Software Oriented Approach". IEEE International Workshop on Rapid System Prototyping 2006: 69-75 | |
| c84 | Lobna Kriaa, Aimen Bouchhima, Wassim Youssef, Frédéric Pétrot, Anne-Marie Fouillart, Ahmed Amine Jerraya: Service Based Component Design Approach for Flexible Hardware/Software Interface Modeling. IEEE International Workshop on Rapid System Prototyping 2006: 156-162 | |
| 2005 | ||
| j28 | Ahmed Amine Jerraya, Wayne Wolf: Hardware/Software Interface Codesign for Embedded Systems. IEEE Computer 38(2): 63-69 (2005) | |
| j27 | Ahmed Amine Jerraya, Hannu Tenhunen, Wayne Wolf: Guest Editors' Introduction: Multiprocessor Systems-on-Chips. IEEE Computer 38(7): 36-40 (2005) | |
| j26 | Iuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: ChronoSym: a new approach for fast and accurate SoC cosimulation. IJES 1(1/2): 103-111 (2005) | |
| j25 | Nacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Amine Jerraya: Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip. IJES 1(1/2): 112-124 (2005) | |
| j24 | Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: Conception des interfaces logiciel-matériel pour l'intégration des mémoires globales dans les systèmes monopuces. Technique et Science Informatiques 24(4): 369-394 (2005) | |
| j23 | Nacer-Eddine Zergainoh, Ludovic Tambour, Henri Michel, Ahmed Amine Jerraya: Méthodes de correction de retard dans les modèles RTL des systèmes monopuces DSP obtenus par assemblage de composants IP : fondement théorique et implémentation. Technique et Science Informatiques 24(10): 1227-1257 (2005) | |
| p1 | Wander O. Cesário, Flávio Rech Wagner, Ahmed Amine Jerraya: Hardware/Software Interfaces Design for SoC. The Industrial Information Technology Handbook 2005: 0- | |
| c83 | Youngchul Cho, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Scheduler implementation in MP SoC design. ASP-DAC 2005: 151-156 | |
| c82 | Nacer-Eddine Zergainoh, Katalin Popovici, Ahmed Amine Jerraya, Pascal Urard: IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systems. ASP-DAC 2005: 612-618 | |
| c81 | Aimen Bouchhima, Iuliana Bacivarov, Wassim Youssef, Marius Bonaciu, Ahmed Amine Jerraya: Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. ASP-DAC 2005: 969-972 | |
| c80 | Adriano Sarmento, Lobna Kriaa, Arnaud Grasset, Mohamed-Wassim Youssef, Aimen Bouchhima, Frédéric Rousseau, Wander O. Cesário, Ahmed Amine Jerraya: Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design. CODES+ISSS 2005: 261-266 | |
| c79 | Aimen Bouchhima, Xi Chen, Frédéric Pétrot, Wander O. Cesário, Ahmed Amine Jerraya: A unified HW/SW interface model to remove discontinuities between HW and SW design. EMSOFT 2005: 159-163 | |
| c78 | Romain Lemaire, Fabien Clermidy, Y. Durand, Didier Lattard, Ahmed Amine Jerraya: Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2. IEEE International Workshop on Rapid System Prototyping 2005: 24-30 | |
| c77 | Arnaud Grasset, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic Generation of Component Wrappers by Composition of Hardware Library Elements Starting from Communication Service Specification. IEEE International Workshop on Rapid System Prototyping 2005: 47-53 | |
| 2004 | ||
| j22 | Nacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Amine Jerraya: A generic architecture model based-methodology for an efficient design of hardware/software application-specific multiprocessor System-on-Chip. Annales des Télécommunications 59(7-8): 784-806 (2004) | |
| j21 | Flávio Rech Wagner, Wander O. Cesário, Luigi Carro, Ahmed Amine Jerraya: Strategies for the integration of hardware and software IP components in embedded systems-on-chip. Integration 37(4): 223-252 (2004) | |
| j20 | Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Ahmed Amine Jerraya: Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits. Journal of Systems and Software 70(3): 229-244 (2004) | |
| c76 | Ahmed Amine Jerraya: EuroSoC: towards a joint university/industry research infrastructure for system on chip and system in package. ASP-DAC 2004: 18 | |
| c75 | Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model. ASP-DAC 2004: 469-474 | |
| c74 | Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya: An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. DAC 2004: 250-255 | |
| c73 | Mohamed-Wassim Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed Amine Jerraya: Debugging HW/SW interface for MPSoC: video encoder system design case study. DAC 2004: 908-913 | |
| c72 | Mohamed-Anouar Dziri, Wander O. Cesário, Flávio Rech Wagner, Ahmed Amine Jerraya: Unified Component Integration Flow for Multi-Processor SoC Design and Validation. DATE 2004: 1132-1137 | |
| c71 | Sungjoo Yoo, Mohamed-Wassim Youssef, Aimen Bouchhima, Ahmed Amine Jerraya, Mario Diaz-Nava: Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software. DATE 2004: 1382-1383 | |
| c70 | ||
| c69 | Arnaud Grasset, Frédéric Rousseau, Ahmed Amine Jerraya: Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation. IEEE International Workshop on Rapid System Prototyping 2004: 66-69 | |
| c68 | Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesário, Ahmed Amine Jerraya: An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. IEEE International Workshop on Rapid System Prototyping 2004: 80-87 | |
| c67 | Adriano Sarmento, Wander O. Cesário, Ahmed Amine Jerraya: Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems. IEEE International Workshop on Rapid System Prototyping 2004: 88-95 | |
| 2003 | ||
| j19 | Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya: Towards SoC Validation Through Prototyping: A Systematic Approach Based on Reconfigurable Platform. Design Autom. for Emb. Sys. 8(2-3): 155-171 (2003) | |
| j18 | ||
| c66 | Mohamed-Anouar Dziri, Firaz Samet, Flávio Rech Wagner, Wander O. Cesário, Ahmed Amine Jerraya: Combining architecture exploration and a path to implementation to build a complete SoC design flow from system specification to RTL. ASP-DAC 2003: 219-224 | |
| c65 | Sungjoo Yoo, Ahmed Amine Jerraya: Introduction to Hardware Abstraction Layers for SoC. DATE 2003: 10336-10337 | |
| c64 | Sungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed Amine Jerraya: Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. DATE 2003: 10550-10555 | |
| c63 | F. Hunsinger, Sebastien Francois, Ahmed Amine Jerraya: Definition of a systematic method for the generation of software test programs allowing the functional verification of System On Chip (SoC). MTV 2003: 11- | |
| c62 | Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya: Embedded Application Prototyping on a Communication-Restricted Reconfigurable. IEEE International Workshop on Rapid System Prototyping 2003: 33-39 | |
| c61 | Ludovic Tambour, Nacer-Eddine Zergainoh, Pascal Urard, Henri Michel, Ahmed Amine Jerraya: An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells. IEEE International Workshop on Rapid System Prototyping 2003: 56-63 | |
| 2002 | ||
| j17 | Wander O. Cesário, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Lovic Gauthier, Mario Diaz-Nava: Multiprocessor SoC Platforms: A Component-Based Design Approach. IEEE Design & Test of Computers 19(6): 52-63 (2002) | |
| j16 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. IEEE Trans. Software Eng. 28(9): 822-831 (2002) | |
| j15 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Exploration de l'espace des solutions architecturales dans le codesign. Technique et Science Informatiques 21(1): 9-35 (2002) | |
| j14 | Gabriela Nicolescu, Kjetil Svarstad, Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Sungjoo Yoo, Philippe Coste, Ahmed Amine Jerraya: Desiderata pour la spécification et la conception des systèmes électroniques. Technique et Science Informatiques 21(3): 291-314 (2002) | |
| c60 | Ferid Gharsalli, Samy Meftali, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic generation of embedded memory wrapper for multiprocessor SoC. DAC 2002: 596-601 | |
| c59 | Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava: Component-based design approach for multicore SoCs. DAC 2002: 789-794 | |
| c58 | Joseph Borel, G. Matheron, Ahmed Amine Jerraya, S. Resve, M. Rogers, Wolfgang Rosenstiel, Irmtraud Rugen-Herzig, F. Theewen: MEDEA+ and ITRS Roadmaps. DATE 2002: 328 | |
| c57 | Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, Ahmed Amine Jerraya: Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. DATE 2002: 620-627 | |
| c56 | Iuliana Bacivarov, Sungjoo Yoo, Ahmed Amine Jerraya: Timed HW-SW cosimulation using native execution of OS and application SW. HLDVT 2002: 51-56 | |
| c55 | Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali, Frédéric Rousseau, Ferid Gharsalli: Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design. ISSS 2002: 26-31 | |
| c54 | Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima, Gabriela Nicolescu: Validation in a Component-Based Design Flow for Multicore SoCs. ISSS 2002: 162-167 | |
| c53 | Gabriela Nicolescu, S. Martinez, Lobna Kriaa, Wassim Youssef, Sungjoo Yoo, Benoît Charlot, Ahmed Amine Jerraya: Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design. VLSI Design 2002: 426- | |
| e3 | Shuvra S. Bhattacharyya, Trevor N. Mudge, Wayne Wolf, Ahmed Amine Jerraya (Eds.): Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002. ACM 2002, isbn 1-58113-575-0 | |
| 2001 | ||
| j13 | Ahmed Amine Jerraya: Two Enduring Questions for Computer Design. IEEE Design & Test of Computers 18(3): 128- (2001) | |
| j12 | Wayne Wolf, Ahmed Amine Jerraya: Application-Specific System-on-a-Chip Multiprocessors. IEEE Design & Test of Computers 18(5): 7- (2001) | |
| j11 | Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya: Colif: A Design Representation for Application-Specific Multiprocessor SOCs. IEEE Design & Test of Computers 18(5): 8-20 (2001) | |
| j10 | Lovic Gauthier, Sungjoo Yoo, Ahmed Amine Jerraya: Automatic generation and targeting of application-specificoperating systems and embedded systems software. IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1293-1301 (2001) | |
| c52 | Patrice Gerin, Sungjoo Yoo, Gabriela Nicolescu, Ahmed Amine Jerraya: Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. ASP-DAC 2001: 63-68 | |
| c51 | Kjetil Svarstad, Nezih Ben-Fredj, Gabriela Nicolescu, Ahmed Amine Jerraya: A higher level system communication model for object-oriented specification and design of embedded systems. ASP-DAC 2001: 69-77 | |
| c50 | Sungjoo Yoo, Gabriela Nicolescu, Damien Lyonnard, Amer Baghdadi, Ahmed Amine Jerraya: A generic wrapper architecture for multi-processor SoC cosimulation and design. CODES 2001: 195-200 | |
| c49 | Damien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed Amine Jerraya: Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. DAC 2001: 518-523 | |
| c48 | Amer Baghdadi, Damien Lyonnard, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: An efficient architecture model for systematic design of application-specific multiprocessor SoC. DATE 2001: 55-63 | |
| c47 | Kjetil Svarstad, Gabriela Nicolescu, Ahmed Amine Jerraya: A model for describing communication between aggregate objects in the specification and design of embedded systems. DATE 2001: 77-85 | |
| c46 | Lovic Gauthier, Sungjoo Yoo, Ahmed Amine Jerraya: Automatic generation and targeting of application specific operating systems and embedded systems software. DATE 2001: 679-685 | |
| c45 | Ahmed Amine Jerraya, G. Matheron: Electronic system design methodology: Europe's positioning. DATE 2001: 720-721 | |
| c44 | Gabriela Nicolescu, Sungjoo Yoo, Ahmed Amine Jerraya: Mixed-level cosimulation for fine gradual refinement of communication in SoC design. DATE 2001: 754-759 | |
| c43 | Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, Ahmed Amine Jerraya: Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication. HLDVT 2001: 79-82 | |
| c42 | Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory. VLSI-SOC 2001: 193-204 | |
| c41 | Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: An optimal memory allocation for application-specific multiprocessor system-on-chip. ISSS 2001: 19-24 | |
| c40 | Ahmed Amine Jerraya, Pierre G. Paulin, Richard Norman, Feliks J. Welfeld: Programming models for network processors (Panel). ISSS 2001: 202 | |
| c39 | Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya: Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design. IEEE International Workshop on Rapid System Prototyping 2001: 110-115 | |
| 2000 | ||
| j9 | Fabiano Hessel, Pascal Coste, Philippe Le Marrec, Nacer-Eddine Zergainoh, Gabriela Nicolescu, Jean-Marc Daveau, Ahmed Amine Jerraya: Interlanguage Communication Synthesis for Heterogeneous Specifications. Design Autom. for Emb. Sys. 5(3-4): 223-236 (2000) | |
| c38 | Rolf Ernst, Ahmed Amine Jerraya: embedded system design with multiple languages: embedded tutorial. ASP-DAC 2000: 391-396 | |
| c37 | Lovic Gauthier, Ahmed Amine Jerraya: Cycle-True Simulation of the ST10 Microcontroller. DATE 2000: 742 | |
| c36 | Salvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz: Towards design and validation of mixed-technology SOCs. ACM Great Lakes Symposium on VLSI 2000: 29-33 | |
| c35 | Wander O. Cesário, Ahmed Amine Jerraya, Zoltan Sugar, Imed Moussa: Rethinking Behavioral Synthesis for a Better Integration within Existing Design Flows. ICCD 2000: 513-518 | |
| c34 | Fabiano Hessel, Philippe Coste, Gabriela Nicolescu, P. LeMarrec, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Multi-Level Communication Synthesis of Heterogeneous Multilanguage Specification. ICCD 2000: 525- | |
| c33 | Amer Baghdadi, Nacer-Eddine Zergainoh, Damien Lyonnard, Ahmed Amine Jerraya: Generic Architecture Platform for Multiprocessor System-On-Chip Design. DIPES 2000: 53-64 | |
| c32 | Nacer-Eddine Zergainoh, Amer Baghdadi, Ludovic Tambour, Damien Lyonnard, Lovic Gauthier, Ahmed Amine Jerraya: Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip. DIPES 2000: 99-110 | |
| c31 | Wander O. Cesário, Zoltan Sugar, Imed Moussa, Ahmed Amine Jerraya: Efficient Integration of Behavioral Synthesis with Existing Design Flows. ISSS 2000: 85-90 | |
| c30 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, T. Roudier, Ahmed Amine Jerraya: Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. IEEE International Workshop on Rapid System Prototyping 2000: 8-13 | |
| c29 | Lovic Gauthier, Ahmed Amine Jerraya: Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals. IEEE International Workshop on Rapid System Prototyping 2000: 60-65 | |
| 1999 | ||
| c28 | Philippe Coste, Fabiano Hessel, P. LeMarrec, Zoltan Sugar, M. Romdhani, Rodolph Suescun, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Multilanguage design of heterogeneous systems. CODES 1999: 54-58 | |
| c27 | Imed Moussa, Zoltan Sugar, Rodolph Suescun, Mario Diaz-Nava, Marco Pavesi, Salvatore Crudo, Luca Gazi, Ahmed Amine Jerraya: Comparing RTL and Behavioral Design Methodologies in the Case of a 2M-Transistor ATM Shaper. DAC 1999: 598-603 | |
| c26 | ||
| c25 | Fabiano Hessel, Philippe Coste, P. LeMarrec, Nacer-Eddine Zergainoh, Jean-Marc Daveau, Ahmed Amine Jerraya: Communication Interface Synthesis for Multilanguage Specifications. IEEE International Workshop on Rapid System Prototyping 1999: 15-20 | |
| e2 | Ahmed Amine Jerraya, Luciano Lavagno, Frank Vahid (Eds.): Proceedings of the Seventh International Workshop on Hardware/Software Codesign, CODES 1999, Rome, Italy, 1999. ACM 1999, isbn 1-58113-132-1 | |
| 1998 | ||
| j8 | Carlos A. Valderrama, François Naçabal, Pierre G. Paulin, Ahmed Amine Jerraya: Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples. Design Autom. for Emb. Sys. 3(2-3): 199-217 (1998) | |
| c24 | Jean-Marc Daveau, Gilberto Fernandes Marchioro, Ahmed Amine Jerraya: Hardware/software co-design of an ATM network interface card: a case study. CODES 1998: 111-115 | |
| c23 | Abderrazek Jemai, Polen Kission, Ahmed Amine Jerraya: Architectural Simulation in the Context of Behavioral Synthesis. DATE 1998: 590-595 | |
| c22 | Fabiano Hessel, P. LeMarrec, Carlos A. Valderrama, M. Romdhani, Ahmed Amine Jerraya: MCI- Multilanguage Distributed Co- Simulation Tool. DIPES 1998: 191-202 | |
| c21 | P. LeMarrec, Carlos A. Valderrama, Fabiano Hessel, Ahmed Amine Jerraya, M. Attia, O. Cayrol: Hardware, Software and Mechanical Cosimulation for Automotive Applications. International Workshop on Rapid System Prototyping 1998: 202-206 | |
| e1 | Gaetano Borriello, Ahmed Amine Jerraya, Luciano Lavagno (Eds.): Proceedings of the Sixth International Workshop on Hardware/Software Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998. IEEE Computer Society 1998, isbn 0-8186-8442-9 | |
| 1997 | ||
| j7 | Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: Compilation Methods for the Address Calculation Units of Embedded Processor Systems. Design Autom. for Emb. Sys. 2(1): 61-77 (1997) | |
| j6 | Carlos A. Valderrama, Adel Changuel, Ahmed Amine Jerraya: Virtual Prototyping For Modular And Flexible Hardware-Software Systems. Design Autom. for Emb. Sys. 2(3-4): 267-282 (1997) | |
| j5 | Clifford Liem, François Naçabal, Carlos A. Valderrama, Pierre G. Paulin, Ahmed Amine Jerraya: System-on-a-Chip Cosimulation and Compilation. IEEE Design & Test of Computers 14(2): 16-25 (1997) | |
| j4 | Ahmed Amine Jerraya, Gert Goossens: Guest Editorial Introduction to the Special Issue on the Eighth IEEE International Symposium on System Synthesis. IEEE Trans. VLSI Syst. 5(1): 57-58 (1997) | |
| j3 | Jean-Marc Daveau, Gilberto Fernandes Marchioro, Tarek Ben Ismail, Ahmed Amine Jerraya: Protocol selection and interface generation for HW-SW codesign. IEEE Trans. VLSI Syst. 5(1): 136-144 (1997) | |
| c20 | Abderrazek Jemai, Polen Kission, Ahmed Amine Jerraya: Embedded architectural simulation within behavioral synthesis environment. ASP-DAC 1997: 227-232 | |
| c19 | Clifford Liem, Marco Cornero, Miguel Santana, Pierre G. Paulin, Ahmed Amine Jerraya, Jean-Marc Gentit, Jean Lopez, Xavier Figari, Laurent Bergher: Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor. DAC 1997: 780-785 | |
| c18 | Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: ReCode: the design and re-design of the instruction codes for embedded instruction-set processors. ED&TC 1997: 612 | |
| c17 | Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ahmed Amine Jerraya: Transformational partitioning for co-design of multiprocessor systems. ICCAD 1997: 508-515 | |
| 1996 | ||
| c16 | Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens: Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC 1996: 573-578 | |
| c15 | Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures. DAC 1996: 597-600 | |
| 1995 | ||
| j2 | Tarek Ben Ismail, Ahmed Amine Jerraya: Synthesis Steps and Design Models for Codesign. IEEE Computer 28(2): 44-52 (1995) | |
| c14 | Maher Rahmouni, Ahmed Amine Jerraya: Formulation and evaluation of scheduling techniques for control flow graphs. EURO-DAC 1995: 386-391 | |
| c13 | Polen Kission, Hong Ding, Ahmed Amine Jerraya: VHDL based design methodology for hierarchy and component re-use. EURO-DAC 1995: 470-475 | |
| c12 | M. Romdhani, P. Chambert, A. Jeffroy, P. de Chazelles, Ahmed Amine Jerraya: Composing ActivityCharts/StateCharts, SDL and SAO specifications for codesign in avionics. EURO-DAC 1995: 585-590 | |
| c11 | Clifford Liem, Pierre G. Paulin, Marco Cornero, Ahmed Amine Jerraya: Industrial experience using rule-driven retargetable code generation for multimedia applications. ISSS 1995: 60-68 | |
| c10 | Jean-Marc Daveau, Tarek Ben Ismail, Ahmed Amine Jerraya: Synthesis of system-level communication by an allocation-based approach. ISSS 1995: 150-155 | |
| 1994 | ||
| j1 | Maher K. Rahmouni, Kevin O'Brien, Ahmed Amine Jerraya: A Loop-Based Scheduling Algorithm for Hardware Description Languages. Parallel Processing Letters 4: 351-364 (1994) | |
| c9 | Tarek Ben Ismail, Mohamed Abid, Ahmed Amine Jerraya: COSMOS: a codesign approach for communicating systems. CODES 1994: 17-24 | |
| c8 | Markus Voss, Tarek Ben Ismail, Ahmed Amine Jerraya, Karl-Heinz Kapp: Towards a theory for hardware/software codesign. CODES 1994: 173-180 | |
| c7 | Polen Kission, Hong Ding, Ahmed Amine Jerraya: Structured Design Methodology for High-Level Design. DAC 1994: 466-471 | |
| c6 | Tarek Ben Ismail, Kevin O'Brien, Ahmed Amine Jerraya: Interactive System-level Partitioning with PARTIF. EDAC-ETC-EUROASIC 1994: 464-468 | |
| 1993 | ||
| c5 | Ahmed Amine Jerraya, Kevin O'Brien, Tarek Ben Ismail: Linking System Design Tools and Hardware Design Tools. CHDL 1993: 345-351 | |
| 1992 | ||
| c4 | I. Park, Kevin O'Brien, Ahmed Amine Jerraya: AMICAL: Architectural Synthesis based on VHDL. Synthesis for Control Dominated Circuits 1992: 219-234 | |
| 1991 | ||
| c3 | Ahmed Amine Jerraya, Pierre G. Paulin, Simon Curry: Meta VHDL for Higher Level Controller Modeling and Synthesis. VLSI 1991: 215-224 | |
| 1990 | ||
| c2 | P. Bondono, Ahmed Amine Jerraya, A. Hornik, Bernard Courtois, D. Bonifas: NAUTILE: a safe environment for silicon compilation. EURO-DAC 1990: 605-609 | |
| 1986 | ||
| c1 | Ahmed Amine Jerraya, P. Varinot, R. Jamier, Bernard Courtois: Principles of the SYCO compiler. DAC 1986: 715-721 | |
Colors in the list of coauthors
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