Jigang Wu
List of publications from the DBLP Bibliography Server - FAQ
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 | 2013 | |
|---|---|---|
| j41 |      | Yun Liu, Feiping Nie, Jigang Wu, Lihui Chen: Efficient semi-supervised feature selection with noise insensitive trace ratio criterion. Neurocomputing 105: 12-18 (2013) |
| j40 | | |
| j39 | | Xinming Duan, Jigang Wu: Deadlock-free Routing Scheme for Irregular Mesh Topology NoCs with Oversized Regions. JCP 8(1): 27-32 (2013) |
| j38 | | Honglei Han, Wenju Liu, Jigang Wu, Guiyuan Jiang: Efficient Algorithm for Hardware/Software Partitioning and Scheduling on MPSoC. JCP 8(1): 61-68 (2013) |
| 2012 | ||
| j37 | | Ze Wang, Maode Ma, Jigang Wu: Securing wireless mesh networks in a unified security framework with corruption-resilience. Computer Networks 56(12): 2981-2993 (2012) |
| j36 | | Jigang Wu, Qiqiang Sun, Thambipillai Srikanthan: Algorithmic aspects for multiple-choice hardware/software partitioning. Computers & OR 39(12): 3281-3292 (2012) |
| j35 | | Guozhi Song, Jigang Wu, John A. Schormans, Laurie G. Cuthbert: Erlang's Fixed-Point Approximation for Performance Analysis of HetNets. J. Applied Mathematics 2012 (2012) |
| j34 | | Yonghong Yao, Shin Min Kang, Jigang Wu, Pei-Xia Yang: A Regularized Gradient Projection Method for the Minimization Problem. J. Applied Mathematics 2012 (2012) |
| j33 | | Kuanfang He, Jigang Wu, Guangbin Wang: Acoustic Emission Signal Feature Extraction in Rotor Crack Fault Diagnosis. JCP 7(9): 2120-2127 (2012) |
| j32 | | Jigang Wu, Xuejun Li, Kuanfang He: Simulation of Rolling Forming of Precision Profile Used for Piston Ring based on LS_DYNA. JCP 7(9): 2208-2215 (2012) |
| j31 | | Jigang Wu, Xuejun Li, Kuanfang He: Rotor Crack Fault Diagnosis based on Base and Multi-sensor Adaptive Weighted Information Fusion. JSW 7(7): 1585-1592 (2012) |
| c30 | | Yuanbo Zhu, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan: Reconfiguration Algorithms for Degradable VLSI Arrays with Switch Faults. ICPADS 2012: 356-361 |
| c29 | | Guiyuan Jiang, Jigang Wu, Jizhou Sun: Non-Backtracking Reconfiguration Algorithm for Three-dimensional VLSI Arrays. ICPADS 2012: 362-367 |
| c28 | | Guiyuan Jiang, Wu Jigang, Jizhou Sun: Efficient Reconfiguration Algorithm for Three-dimensional VLSI Arrays. IPDPS Workshops 2012: 261-265 |
| c27 | | Wu Jigang, Guiyuan Jiang, Yuanrui Zhang, Yuanbo Zhu: Algorithm for Communication Synchronization on Reconfigurable Processor Arrays with Faults. IPDPS Workshops 2012: 266-270 |
| 2011 | ||
| j30 | | Tao Li, Jigang Wu, Yun Deng, Thambipillai Srikanthan, Xicheng Lu: Accelerating identification of custom instructions for extensible processors. IET Circuits, Devices & Systems 5(1): 21-32 (2011) |
| j29 | | Xuejun Li, Dalian Yang, Jigang Wu: SVM Optimization based on BFA and its Application in AE Rotor Crack Fault Diagnosis. JCP 6(10): 2084-2091 (2011) |
| j28 | | Kuanfang He, Jigang Wu, Guangbin Wang: Time-Frequency Entropy Analysis of Alternating Current Square Wave Current Signal in Submerged Arc Welding. JCP 6(10): 2092-2097 (2011) |
| j27 | | Jigang Wu, Song Jin, Haikun Ji, Thambipillai Srikanthan: Algorithm for Time-dependent Shortest Safe Path on Transportation Networks. Procedia CS 4: 958-966 (2011) |
| j26 | | Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan: A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM. T. HiPEAC 4: 234-253 (2011) |
| 2010 | ||
| j25 | | Abhijit Ray, Thambipillai Srikanthan, Wu Jigang: Rapid Techniques for Performance Estimation of Processors. Journal of Research and Practice in Information Technology 42(2): 147-168 (2010) |
| j24 | | Amit Kumar Singh, Thambipillai Srikanthan, Akash Kumar, Wu Jigang: Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms. Journal of Systems Architecture - Embedded Systems Design 56(7): 242-255 (2010) |
| j23 | | Tao Li, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu: Selecting profitable custom instructions for reconfigurable processors. Journal of Systems Architecture - Embedded Systems Design 56(8): 340-351 (2010) |
| j22 | | Jigang Wu, Thambipillai Srikanthan, Ting Lei: Efficient heuristic algorithms for path-based hardware/software partitioning. Mathematical and Computer Modelling 51(7-8): 974-984 (2010) |
| j21 | | Amit Kumar Singh, Wu Jigang, Akash Kumar, Thambipillai Srikanthan: Run-time mapping of multiple communicating tasks on MPSoC platforms. Procedia CS 1(1): 1019-1026 (2010) |
| j20 | | Wu Jigang, Thambipillai Srikanthan, Guang Chen: Algorithmic Aspects of Hardware/Software Partitioning: 1D Search Algorithms. IEEE Trans. Computers 59(4): 532-544 (2010) |
| j19 | | Jigang Wu, Thambipillai Srikanthan, Xiaogang Han: Preprocessing and Partial Rerouting Techniques for Accelerating Reconfiguration of Degradable VLSI Arrays. IEEE Trans. VLSI Syst. 18(2): 315-319 (2010) |
| 2009 | ||
| j18 | | Jigang Wu, Thambipillai Srikanthan, Kai Wang: Minimizing interconnect length on reconfigurable meshes. Frontiers of Computer Science in China 3(3): 315-321 (2009) |
| j17 | | Siew Kei Lam, Huang Fan, Thambipillai Srikanthan, Wu Jigang: Run-time management of custom instructions on a partially reconfigurable architecture. IJICT 2(1/2): 50-59 (2009) |
| c26 | | Wu Jigang, Ting Lei, Thambipillai Srikanthan: Efficient Approximate Algorithm for Hardware/Software Partitioning. ACIS-ICIS 2009: 261-265 |
| c25 | | Tao Li, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu: Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection. ACIS-ICIS 2009: 266-270 |
| c24 | | Wu Jigang, Baofang Chang, Thambipillai Srikanthan: A Hybrid Branch-and-Bound Strategy for Hardware/Software Partitioning. ACIS-ICIS 2009: 641-644 |
| c23 | | Tao Li, Zhigang Sun, Wu Jigang, Xicheng Lu: Fast enumeration of maximal valid subgraphs for custom-instruction identification. CASES 2009: 29-36 |
| c22 | | Amit Kumar Singh, Wu Jigang, Alok Prakash, Thambipillai Srikanthan: Mapping Algorithms for NoC-Based Heterogeneous MPSoC Platforms. DSD 2009: 133-140 |
| c21 | | Amit Kumar Singh, Wu Jigang, Alok Prakash, Thambipillai Srikanthan: Efficient Heuristics for Minimizing Communication Overhead in NoC-based Heterogeneous MPSoC Platforms. IEEE International Workshop on Rapid System Prototyping 2009: 55-60 |
| 2008 | ||
| j16 | | Wu Jigang, Thambipillai Srikanthan, Tao Jiao: Algorithmic aspects for functional partitioning and scheduling in hardware/software co-design. Design Autom. for Emb. Sys. 12(4): 345-375 (2008) |
| j15 | | Jigang Wu, Thambipillai Srikanthan, Guang-Wei Zou: New Model and Algorithm for Hardware/Software Partitioning. J. Comput. Sci. Technol. 23(4): 644-651 (2008) |
| j14 | | Jigang Wu, Thambipillai Srikanthan, Chengbin Yan: Algorithmic aspects for power-efficient hardware/software partitioning. Mathematics and Computers in Simulation 79(4): 1204-1215 (2008) |
| c20 | | |
| c19 | | Wu Jigang, Thambipillai Srikanthan, Kai Wang: Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays. ISCAS 2008: 1352-1355 |
| c18 | | Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan: A temperature-aware virtual submesh allocation scheme for noc-based manycore chips. SPAA 2008: 182-184 |
| 2007 | ||
| j13 | | Wu Jigang, Thambipillai Srikanthan, Xiaodong Wang: Integrated Row and Column Rerouting for Reconfiguration of VLSI Arrays with Four-Port Switches. IEEE Trans. Computers 56(10): 1387-1400 (2007) |
| c17 | | Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan: Temperature-Aware Submesh Allocation Scheme for Heat Balancing on Chip-Multiprocessors. ASAP 2007: 228-233 |
| c16 | | Wu Jigang, Thambipillai Srikanthan, Guang Chen: One-dimensional Search Algorithms for Hardware/Software Partitioning. MEMOCODE 2007: 149-158 |
| 2006 | ||
| j12 | | Wu Jigang, Thambipillai Srikanthan: Low-complex dynamic programming algorithm for hardware/software partitioning. Inf. Process. Lett. 98(2): 41-46 (2006) |
| j11 | | Wu Jigang, Thambipillai Srikanthan: An efficient algorithm for the collapsing knapsack problem. Inf. Sci. 176(12): 1739-1751 (2006) |
| j10 | | Wu Jigang, Thambipillai Srikanthan: Reconfiguration Algorithms for Power Efficient VLSI Subarrays with Four-Port Switches. IEEE Trans. Computers 55(3): 243-253 (2006) |
| j9 | | Wu Jigang, Thambipillai Srikanthan: Algorithmic aspects of area-efficient hardware/software partitioning. The Journal of Supercomputing 38(3): 223-235 (2006) |
| c15 | | Wu Jigang, Thambipillai Srikanthan, Xiaodong Wang: New Reconfiguration Algorithm for Degradable VLSI Arrays. APCCAS 2006: 1152-1155 |
| c14 | | Wu Jigang, Thambipillai Srikanthan: Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area. APCCAS 2006: 1875-1878 |
| c13 | | Leipo Yan, Siew Kei Lam, Thambipillai Srikanthan, Wu Jigang: Energy Efficient Cache Tuning with Performance Bound. DELTA 2006: 97-100 |
| c12 | | Wu Jigang, Thambipillai Srikanthan, Tao Jiao: Efficient algorithm for functional scheduling in hardware/software co-design. FPT 2006: 65-72 |
| 2005 | ||
| j8 | | Wu Jigang, Thambipillai Srikanthan: Power Efficient Sub-Array in Reconfigurable VLSI Meshes. J. Comput. Sci. Technol. 20(5): 647-653 (2005) |
| j7 | | Wu Jigang, Thambipillai Srikanthan, Heiko Schröder: Efficient reconfigurable techniques for VLSI arrays with 6-port switches. IEEE Trans. VLSI Syst. 13(8): 976-979 (2005) |
| c11 | | Wu Jigang, Thambipillai Srikanthan, Chengbin Yan: Minimizing Power in Hardware/Software Partitioning. Asia-Pacific Computer Systems Architecture Conference 2005: 580-588 |
| c10 | | Wu Jigang, Thambipillai Srikanthan, Heiko Schröder: Efficient Techniques and Hardware Analysis for Mesh-Connected Processors. ICA3PP 2005: 442-446 |
| c9 | | Abhijit Ray, Thambipillai Srikanthan, Wu Jigang: Practical Techniques for Performance Estimation of Processors. IWSOC 2005: 308-311 |
| 2004 | ||
| j6 | | Abhijit Ray, Wu Jigang, Thambipillai Srikanthan: Knapsack Model and Algorithm for Hardware/Software Partitioning Problem. Computers and Artificial Intelligence 23(5): 557-569 (2004) |
| j5 | | Wu Jigang, Thambipillai Srikanthan: An efficient data structure for branch-and-bound algorithm. Inf. Sci. 167(1-4): 233-237 (2004) |
| c8 | | Wu Jigang, Thambipillai Srikanthan: Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays. Asia-Pacific Computer Systems Architecture Conference 2004: 440-448 |
| c7 | | Abhijit Ray, Wu Jigang, Thambipillai Srikanthan: Knapsack Model and Algorithm for HW/SW Partitioning Problem. International Conference on Computational Science 2004: 200-205 |
| c6 |  | Wu Jigang, Thambipillai Srikanthan: Fast reconfiguring mesh-connected VLSI arrays. ISCAS (2) 2004: 949-952 |
| 2003 | ||
| j4 | | Wu Jigang, Thambipillai Srikanthan: An improved reconfiguration algorithm for degradable VLSI/WSI arrays. Journal of Systems Architecture 49(1-2): 23-31 (2003) |
| c5 | | Wu Jigang, Thambipillai Srikanthan, Chandni R. Patel: A Low Power Algorithm for Reconfigurable VLSI/WSI Arrays. Embedded Systems and Applications 2003: 237-242 |
| c4 | | Wu Jigang, Thambipillai Srikanthan: On the Reconfiguration Algorithm for Fault-Tolerant VLSI Arrays. International Conference on Computational Science 2003: 360-366 |
| c3 | | Wu Jigang, Thambipillai Srikanthan: Partial rerouting algorithm for reconfigurable VLSI arrays. ISCAS (5) 2003: 641-644 |
| c2 | | Wu Jigang, Thambipillai Srikanthan: A Run-time Reconfiguration Algorithm for VLSI Arrays. VLSI Design 2003: 567-572 |
| 2002 | ||
| c1 | | Wu Jigang, Heiko Schröder, Thambipillai Srikanthan: New Architecture and Algorithms for Degradable VLSI/WSI Arrays. COCOON 2002: 181-190 |
| 2001 | ||
| j3 | | Wu Jigang, Lei Yunfei, Heiko Schröder: A Minimal Reduction Approach for the Collapsing Knapsack Problem. Computers and Artificial Intelligence 20(4) (2001) |
| 2000 | ||
| j2 | | Wu Jigang, Yongchang Ji, Guoliang Chen: An Optimal Online Algorithm for Halfplane Intersection. J. Comput. Sci. Technol. 15(3): 295-299 (2000) |
| 1994 | ||
| j1 | | Jigang Wu, Hong Zhu: The least basic operations on heap and improved heapsort. J. Comput. Sci. Technol. 9(3): 261-266 (1994) |
Colors in the list of coauthors
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