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 | 2012 | |
|---|---|---|
| c11 |      | Xiangfang Mao, Jie Jin, Jinsheng Yang: Analysis of the Square Pillar Electromagnetic Scattering under the PML Absorbing Boundary Condition. ICPCA/SWS 2012: 389-395 |
| c10 | | Hongya Wang, LihChyun Shu, Wei Yin, Jie Jin, Jiao Cao: The Hyperbolic Schedulability Bound for Multiprocessor RM Scheduling. RTCSA 2012: 124-133 |
| 2011 | ||
| c9 | | Hongya Wang, Jie Jin, Zhijun Wang, LihChyun Shu: On a novel property of the earliest deadline first algorithm. FSKD 2011: 197-201 |
| c8 | | Jie Jin, Lei Pan, Chongjun Wang, Junyuan Xie: A Center-Based Community Detection Method in Weighted Networks. ICTAI 2011: 513-518 |
| 2010 | ||
| j4 | | Chengjian Zhang, Tingting Qin, Jie Jin: The extended Pouzet-Runge-Kutta methods for nonlinear neutral delay-integro-differential equations. Computing 90(1-2): 57-71 (2010) |
| j3 | | Jie Jin, Chi-Ying Tsui: An Energy Efficient Layered Decoding Architecture for LDPC Decoder. IEEE Trans. VLSI Syst. 18(8): 1185-1195 (2010) |
| c7 | | Taobin Jin, Jie Jin, Ruipu Yao, Kejia Li, Yizhen Zhang: RBF model of microwave filter using PDGS with defected rectangles. ICNC 2010: 519-522 |
| c6 | | Taobin Jin, Jie Jin, Yuan Li, Kejia Li, Shan Yang: Intelligent model of microwave low-pass filter using PDGS with defected rectangles. ICNC 2010: 1705-1708 |
| c5 | | Taobin Jin, Jie Jin, Ruipu Yao, Hongmeng Ji, Yizhen Zhang: Transmission properties study of PDGS with defected triangles. WCNIS 2010: 37-40 |
| 2009 | ||
| j2 | | Chengjian Zhang, Tingting Qin, Jie Jin: An improvement of the numerical stability results for nonlinear neutral delay-integro-differential equations. Applied Mathematics and Computation 215(2): 548-556 (2009) |
| c4 | | Jie Jin, Chi-Ying Tsui: Improving the Hardware Utilization Efficiency of Partially Parallel LDPC Decoder with Scheduling and Sub-matrix Decomposition. ISCAS 2009: 2233-2236 |
| c3 | | Weibo Li, Yanbing Zhang, Jie Jin: Research of the Service Design Approach Based on SCA_OSGi. SSME 2009: 392-395 |
| 2008 | ||
| c2 | | Jie Jin, Chi-Ying Tsui: A low power layered decoding architecture for LDPC decoder implementation for IEEE 802.11n LDPC codes. ISLPED 2008: 253-258 |
| 2007 | ||
| j1 | | Jie Jin, Chi-Ying Tsui: Low-Power Limited-Search Parallel State Viterbi Decoder Implementation Based on Scarce State Transition. IEEE Trans. VLSI Syst. 15(10): 1172-1176 (2007) |
| 2006 | ||
| c1 | | Jie Jin, Chi-Ying Tsui: A low power Viterbi decoder implementation using scarce state transition and path pruning scheme for high throughput wireless applications. ISLPED 2006: 406-411 |
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