F. G. M. de Jong
List of publications from the DBLP Bibliography Server - FAQ| 2008 | ||
|---|---|---|
| c13 | Vladimir A. Zivkovic, Frank van der Heyden, Guido Gronthoud, Frans de Jong: Analog Test Bus Infrastructure for RF/AMS Modules in Core-Based Design. European Test Symposium 2008: 27-32 | |
| 2007 | ||
| c12 | ||
| 2006 | ||
| c11 | ||
| 2003 | ||
| c10 | Wouter Rijckaert, Frans de Jong: Board Test Coverage: The Value of Prediction and How to Compare Numbers. ITC 2003: 1277 | |
| c9 | ||
| 2002 | ||
| c8 | Rodger Schuttert, Frans de Jong, Ben Kup: Improved Test Monitor Circuit in Power Pin DfT. VTS 2002: 345-350 | |
| 2001 | ||
| c7 | F. G. M. de Jong, Alex S. Biewenga, D. C. L. van Geest, T. F. Waayers: Testing and programming flash memories on assemblies during high volume production. ITC 2001: 470-479 | |
| 2000 | ||
| c6 | Frans de Jong, Ben Kup, Rodger Schuttert: Power pin testing: making the test coverage complete. ITC 2000: 575-584 | |
| 1999 | ||
| c5 | Alex S. Biewenga, Henk D. L. Hollmann, Frans de Jong, Maurice Lousberg: Static component interconnect test technology (SCITT) a new technology for assembly testing. ITC 1999: 439-448 | |
| c4 | ||
| 1992 | ||
| c3 | Frans de Jong, Adriaan J. de Lind van Wijngaarden: Memory Interconnection Test at Board Level. ITC 1992: 328-337 | |
| 1991 | ||
| c2 | Frans de Jong, Frank van der Heyden: Testing the Integrity of the Boundary Scan Test Infrastructure. ITC 1991: 106-112 | |
| 1990 | ||
| c1 | ||
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