| 2000 | ||
|---|---|---|
| c13 | Nancy A. Day, Jeffrey J. Joyce: A Framework for Multi-Notation Requirements Specification and Analysis. ICRE 2000: 39-48 | |
| 1999 | ||
| c12 | ||
| 1997 | ||
| c11 | James H. Andrews, Nancy A. Day, Jeffrey J. Joyce: Using a Formal Description Technique to Model Aspects of a Global Air Traffic Telecommunications Network. FORTE 1997: 417-432 | |
| 1994 | ||
| c10 | Jeffrey J. Joyce, Nancy A. Day, Michael R. Donat: S: A Machine Readable Specification Notation based on Higher Order Logic. TPHOLs 1994: 285-299 | |
| e2 | Jeffrey J. Joyce, Carl-Johan H. Seger (Eds.): Higher Order Logic Theorem Proving and its Applications, 6th International Workshop, HUG '93, Vancouver, BC, Canada, August 11-13, 1993, Proceedings. Lecture Notes in Computer Science 780, Springer 1994, isbn 3-540-57826-9 | |
| 1993 | ||
| c9 | ||
| c8 | Jeffrey J. Joyce, Carl-Johan H. Seger: Linking BDD-Based Symbolic Evaluation to Interactive Theorem-Proving. DAC 1993: 469-474 | |
| c7 | Jeffrey J. Joyce, Carl-Johan H. Seger: The HOL-Voss System: Model-Checking inside a General-Purpose Theorem-Prover. HUG 1993: 185-198 | |
| c6 | Zheng Zhu, Jeffrey J. Joyce, Carl-Johan H. Seger: Verification of the Tamarack-3 Microprocessor in a Hybrid Verification Environment. HUG 1993: 253-266 | |
| c5 | ||
| c4 | Sreeranga P. Rajan, Jeffrey J. Joyce, Carl-Johan H. Seger: From Abstract Data Types to Shift Registers: A Case Study in Formal Specification and Verification at Differing Levels of Abstraction using Theorem Proving and Symbolic Simulation. HUG 1993: 489-500 | |
| 1992 | ||
| e1 | Myla Archer, Jeffrey J. Joyce, Karl N. Levitt, Phillip J. Windley (Eds.): Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, August 1991, Davis, California, USA. IEEE Computer Society 1992 | |
| 1991 | ||
| c3 | Carl-Johan H. Seger, Jeffrey J. Joyce: A Two-Level Formal Verification Methodology using HOL and COSMOS. CAV 1991: 299-309 | |
| 1989 | ||
| c2 | Jeffrey J. Joyce: Totally Verified Systems: Linking Verified Software to Verified Hardware. Hardware Specification, Verification and Synthesis 1989: 177-201 | |
| 1988 | ||
| c1 | Jeffrey J. Joyce: Formal Specification and Verification of Asynchronous Processes in Higher-Order Logic. Specification and Verification of Concurrent Systems 1988: 384-409 | |
| 1 | James H. Andrews (J. H. Andrews, Jamie Andrews) | |
| 2 | Myla Archer | |
| 3 | Nancy A. Day | |
| 4 | Michael R. Donat | |
| 5 | Karl N. Levitt | |
| 6 | Sreeranga P. Rajan | |
| 7 | Carl-Johan H. Seger | |
| 8 | Phillip J. Windley | |
| 9 | Zheng Zhu |
Colors in the list of coauthors
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