Ben H. H. Juurlink

Chi Ching Chi, Mauricio Alvarez Mesa, Jan Lucas, Ben H. H. Juurlink, Thomas Schierl: Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis. Signal Processing Systems 71(3): 247-260 (2013)

Ben H. H. Juurlink, Cor Meenderinck: Amdahl's law for predicting the future of multicores considered harmful. SIGARCH Computer Architecture News 40(2): 1-9 (2012)

Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink, Gordon Clare, Félix Henry, Stéphane Pateux, Thomas Schierl: Parallel Scalability and Efficiency of HEVC Parallelization Approaches. IEEE Trans. Circuits Syst. Video Techn. 22(12): 1827-1838 (2012)

Gervin Thomas, Karthik Chandrasekar, Benny Akesson, Ben H. H. Juurlink, Kees Goossens: A Predictor-Based Power-Saving Policy for DRAM Memories. DSD 2012: 882-889

Biao Wang, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink: An Optimized Parallel IDCT on Graphics Processing Units. Euro-Par Workshops 2012: 155-164

Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink, Valeri George, Thomas Schierl: Parallel video decoding in the emerging HEVC standard. ICASSP 2012: 1545-1548

Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink, Valeri George, Thomas Schierl: Improving the parallelization efficiency of HEVC decoding. ICIP 2012: 213-216

Tamer Dallou, Ben H. H. Juurlink: Hardware-Based Task Dependency Resolution for the StarSs Programming Model. ICPP Workshops 2012: 367-374

Michael Andersch, Chi Ching Chi, Ben H. H. Juurlink: Programming parallel embedded and consumer applications in OpenMP superscalar. PPOPP 2012: 281-282

Michael Andersch, Chi Ching Chi, Ben H. H. Juurlink: Using OpenMP superscalar for parallelization of embedded and consumer applications. ICSAMOS 2012: 23-32

Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero: A Highly Scalable Parallel Implementation of H.264. T. HiPEAC 4: 111-134 (2011)

Arnaldo Azevedo, Ben H. H. Juurlink: An Instruction to Accelerate Software Caches. ARCS 2011: 158-170

Jude Angelo Ambrose, Anca Mariana Molnos, Andrew Nelson, Sorin Cotofana, Kees Goossens, Ben H. H. Juurlink: Composable local memory organisation for streaming applications on embedded MPSoCs. Conf. Computing Frontiers 2011: 23

Cor Meenderinck, Ben H. H. Juurlink: Nexus: Hardware Support for Task-Based Programming. DSD 2011: 442-445

Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström: Implications of Merging Phases on Scalability of Multi-core Architectures. ICPP 2011: 622-631

Chi Ching Chi, Ben H. H. Juurlink: A QHD-capable parallel H.264 decoder. ICS 2011: 317-326

Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström: Poster: implications of merging phases on scalability of multi-core architectures. ICS 2011: 380

Ben H. H. Juurlink: Multi-Core - the Future of Embedded Systems. MBMV 2011: 111-111

Arnaldo Azevedo, Ben H. H. Juurlink: A Multidimensional Software Cache for Scratchpad-Based Systems. IJERTCS 1(4): 1-20 (2010)

Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastian Isaza, Georgi Gaydadjiev: The SARC Architecture. IEEE Micro 30(5): 16-29 (2010)

Demid Borodin, Ben H. H. Juurlink: Protective redundancy overhead reduction using instruction vulnerability factor. Conf. Computing Frontiers 2010: 319-326

Demid Borodin, Ben H. H. Juurlink: Instruction precomputation with memoization for fault detection. DATE 2010: 1665-1668

Cor Meenderinck, Ben H. H. Juurlink: A Case for Hardware Task Management Support for the StarSS Programming Model. DSD 2010: 347-354

Martijn Briejer, Cor Meenderinck, Ben H. H. Juurlink: Extending the Cell SPE with Energy Efficient Branch Prediction. Euro-Par (1) 2010: 304-315

Chi Ching Chi, Ben H. H. Juurlink, Cor Meenderinck: Evaluation of parallel H.264 decoding strategies for the Cell Broadband Engine. ICS 2010: 105-114

Pepijn J. de Langen, Ben H. H. Juurlink: Leakage-Aware Multiprocessor Scheduling. Signal Processing Systems 57(1): 73-88 (2009)

Demid Borodin, Ben H. H. Juurlink, Said Hamdioui, Stamatis Vassiliadis: Instruction-Level Fault Tolerance Configurability. Signal Processing Systems 57(1): 89-105 (2009)

Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez: Parallel Scalability of Video Decoders. Signal Processing Systems 57(2): 173-194 (2009)

Asadollah Shahbahrami, Ben H. H. Juurlink: Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices. APPT 2009: 389-407

Cor Meenderinck, Ben H. H. Juurlink: Specialization of the Cell SPE for Media Applications. ASAP 2009: 46-52

Arnaldo P. Azevedo Filho, Ben H. H. Juurlink: Scalar Processing Overhead on SIMD-Only Architectures. ASAP 2009: 183-190

Pepijn J. de Langen, Ben H. H. Juurlink: Limiting the number of dirty cache lines. DATE 2009: 670-675

Demid Borodin, Ben H. H. Juurlink, Stefanos Kaxiras: Instruction Precomputation for Fault Detection. DSD 2009: 91-99

Asadollah Shahbahrami, Ben H. H. Juurlink: SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform. DSD 2009: 497-504

Pedro C. Diniz, Ben H. H. Juurlink, Alain Darte, Wolfgang Karl: Introduction. Euro-Par 2009: 295-296

Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez: Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC 2009: 404-418

Cor Meenderinck, Ben H. H. Juurlink: Intra-vector SIMD instructions for core specialization. ICCD 2009: 479-484

Mauricio Alvarez Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero: Scalability of Macroblock-level Parallelism for H.264 Decoding. ICPADS 2009: 236-243

Ben H. H. Juurlink, Iosif Antochi, Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis: GRAAL: A Framework for Low-Power 3D Graphics Accelerators. IEEE Computer Graphics and Applications 28(4): 63-73 (2008)

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: Versatility of extended subwords and the matrix register file. TACO 5(1) (2008)

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: Implementing the 2-D Wavelet Transform on SIMD-Enhanced General-Purpose Processors. IEEE Transactions on Multimedia 10(1): 43-51 (2008)

Pepijn J. de Langen, Ben H. H. Juurlink: Memory copies in multi-level memory systems. ASAP 2008: 281-286

Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink: Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture. DSD 2008: 189-194

Demid Borodin, Ben H. H. Juurlink: A Low-Cost Cache Coherence Verification Method for Snooping Systems. DSD 2008: 219-227

Cor Meenderinck, Ben H. H. Juurlink: (When) Will CMPs Hit the Power Wall?. Euro-Par Workshops 2008: 184-193

Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez: Analysis of video filtering on the cell processor. ISCAS 2008: 488-491

Asadollah Shahbahrami, Ben H. H. Juurlink: Optimization of Content-Based Image Retrieval Functions. ISM 2008: 607-612

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: SIMD Vectorization of Histogram Functions. ASAP 2007: 174-179

Pepijn J. de Langen, Ben H. H. Juurlink: Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors. SAMOS 2007: 75-85

Demid Borodin, Ben H. H. Juurlink, Stamatis Vassiliadis: Instruction-Level Fault Tolerance Configurability. ICSAMOS 2007: 110-117

Asadollah Shahbahrami, Ben H. H. Juurlink, Demid Borodin, Stamatis Vassiliadis: Avoiding Conversion and Rearrangement Overhead in SIMD Architectures. International Journal of Parallel Programming 34(3): 237-260 (2006)

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: Limitations of special-purpose instructions for similarity measurements in media SIMD extensions. CASES 2006: 293-303

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: Improving the memory behavior of vertical filtering in the discrete wavelet transform. Conf. Computing Frontiers 2006: 253-260

Pepijn J. de Langen, Ben H. H. Juurlink: Leakage-aware multiprocessor scheduling for low power. IPDPS 2006

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: Accelerating Color Space Conversion Using Extended Subwords and the Matrix Register File. ISM 2006: 37-46

Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff: The CSI multimedia architecture. IEEE Trans. VLSI Syst. 13(1): 1-13 (2005)

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: Performance Comparison of SIMD Implementations of the Discrete Wavelet Transform. ASAP 2005: 393-398

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis: Matrix register file and extended subwords: two techniques for embedded media processors. Conf. Computing Frontiers 2005: 171-179

Stephan Suijkerbuijk, Ben H. H. Juurlink: Implementing Hardware Multithreading in a VLIW Architecture. IASTED PDCS 2005: 674-679

Ben H. H. Juurlink, Asadollah Shahbahrami, Stamatis Vassiliadis: Avoiding data conversions in embedded media processors. SAC 2005: 901-902

Ben H. H. Juurlink, Pepijn J. de Langen: Dynamic techniques to reduce memory traffic in embedded systems. Conf. Computing Frontiers 2004: 192-201

Pepijn J. de Langen, Ben H. H. Juurlink: Reducing traffic generated by conflict misses in caches. Conf. Computing Frontiers 2004: 235-239

Ben H. H. Juurlink: Approximating the optimal replacement algorithm. Conf. Computing Frontiers 2004: 313-319

Peter Groen, Panu Hämäläinen, Ben H. H. Juurlink, Timo Hämäläinen: Accelerating the secure remote password protocol using reconfigurable hardware. Conf. Computing Frontiers 2004: 471-480

Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha: Scene Management Models and Overlap Tests for Tile-Based Rendering. DSD 2004: 424-431

Pyrrhos Stathis, Dmitry Cheresiz, Stamatis Vassiliadis, Ben H. H. Juurlink: Sparse Matrix Transpose Unit. IPDPS 2004

Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha: GraalBench: a 3D graphics benchmark suite for mobile phones. LCTES 2004: 1-9

Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha: Memory Bandwidth Requirements of Tile-Based Rendering. SAMOS 2004: 323-332

Ben H. H. Juurlink, Petr Kolman, Friedhelm Meyer auf der Heide, Ingo Rieping: Optimal broadcast on parallel locality models. J. Discrete Algorithms 1(2): 151-166 (2003)

Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff: Implementation of a streaming execution unit. Journal of Systems Architecture 49(12-15): 599-617 (2003)

Olaf Bonorden, Ben H. H. Juurlink, Ingo von Otte, Ingo Rieping: The Paderborn University BSP (PUB) library. Parallel Computing 29(2): 187-207 (2003)

Ben H. H. Juurlink: Unified Dual Data Caches. DSD 2003: 33-40

Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff: Implementation of a Streaming Execution Unit. DSD 2002: 156-165

Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff: Performance Scalability of Multimedia Instruction Set Extensions. Euro-Par 2002: 849-860

Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff: Architectural Support for 3D Graphics in the Complex Streamed Instruction Set. IASTED PDCS 2002: 531-536

Ben H. H. Juurlink, Stamatis Vassiliadis, Dmitri Tcheressiz, Harry A. G. Wijshoff: Implementation and Evaluation of the Complex Streamed Instruction Set. IEEE PACT 2001: 73-82

Dmitri Tcheressiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff: Performance of the Complex Streamed Instruction Set on Image Processing Kernels. Euro-Par 2001: 678-686

Sorin Cotofana, Ben H. H. Juurlink, Stamatis Vassiliadis: Counter Based Superscalar Instruction Issuing. EUROMICRO 2000: 1307-1315

Stamatis Vassiliadis, Ben H. H. Juurlink, Edwin A. Hakkennes: Complex Streamed Instructions: Introduction and Initial Evaluatio. EUROMICRO 2000: 1400-

Ben H. H. Juurlink, Petr Kolman, Friedhelm Meyer auf der Heide, Ingo Rieping: Optimal broadcast on parallel locality models. SIROCCO 2000: 221-225

Olaf Bonorden, Ben H. H. Juurlink, Ingo von Otte, Ingo Rieping: The Paderborn University BSP (PUB) Library - Design, Implementation and Performance. IPPS/SPDP 1999: 99-104

Ben H. H. Juurlink, Harry A. G. Wijshoff: A Quantitative Comparison of Parallel Computation Models. ACM Trans. Comput. Syst. 16(3): 271-318 (1998)

Ben H. H. Juurlink, Jop F. Sibeyn, P. S. Rao: Gossiping on Meshes and Tori. IEEE Trans. Parallel Distrib. Syst. 9(6): 513-525 (1998)

Ben H. H. Juurlink: Experimental Validation of Parallel Computation Models on the Intel Paragon. IPPS/SPDP 1998: 492-497

Micah Adler, Wolfgang Dittrich, Ben H. H. Juurlink, Miroslaw Kutylowski, Ingo Rieping: Communication-Optimal Parallel Minimum Spanning Tree Algorithms (Extended Abstract). SPAA 1998: 27-36

Ben H. H. Juurlink, Harry A. G. Wijshoff: Communication Primitives for BSP Computers. Inf. Process. Lett. 58(6): 303-310 (1996)

Ben H. H. Juurlink, Harry A. G. Wijshoff: The E-BSP Model: Incorporating General Locality and Unbalanced Communication into the BSP Model. Euro-Par, Vol. II 1996: 339-347

Ben H. H. Juurlink, P. S. Rao, Jop F. Sibeyn: Worm-Hole Gossiping on Meshes. Euro-Par, Vol. I 1996: 361-369

Harry A. G. Wijshoff, Ben H. H. Juurlink: A Quantitative Comparison of Parallel Computation Models. SPAA 1996: 13-24

Ben H. H. Juurlink, Harry A. G. Wijshoff: The Parallel Hierarchical Memory Model. SWAT 1994: 240-251

Ben H. H. Juurlink, Harry A. G. Wijshoff: Experiences with a Model for Parallel Computation. PODC 1993: 87-96