| 2013 | ||
|---|---|---|
| j2 | Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda: Round Addition Using Faults for Generalized Feistel Network. IEICE Transactions 96-D(1): 146-150 (2013) | |
| 2008 | ||
| j1 | Masahiro Kaminaga, Takashi Watanabe, Takashi Endo, Toshio Okochi: Logic-Level Analysis of Fault Attacks and a Cost-Effective Countermeasure Design. IEICE Transactions 91-A(7): 1816-1819 (2008) | |
| 1 | Takashi Endo | |
| 2 | Toshio Okochi | |
| 3 | Arimitsu Shikoda | |
| 4 | Takashi Watanabe | |
| 5 | Hideki Yoshikawa |
Colors in the list of coauthors
Last update Tue May 21 21:43:22 2013 CET by the DBLP Team —
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