| 1991 | ||
|---|---|---|
| j1 | Yasuro Shobatake, Masahiko Motoyama, Emiko Shobatake, Takashi Kamitake, Shoichi Shimizu, Makoto Noda, Kenji Sakaue: A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture. IEEE Journal on Selected Areas in Communications 9(8): 1248-1254 (1991) | |
| 1986 | ||
| c2 | Makoto Nakamura, Hideo Suzuki, Takashi Kamitake, Masahiko Ohnishi, Tsunetaro Saki, Takashi Totoki, Hitoshi Tsuchihashi: A 32 kb/s ADPCM Codec Single-Chip LSI Based on CCITT's G.721 Standard. ICC 1986: 1300-1304 | |
| 1984 | ||
| c1 | Takashi Kamitake: Fast Start-Up of an Echo Canceller in a 2-Wire Full-Duplex Modem. ICC (1) 1984: 360-364 | |
Colors in the list of coauthors
Last update Sat May 25 20:50:28 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page