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 | 2012 | |
|---|---|---|
| j2 |      | Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga: A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions. IEICE Transactions 95-D(7): 1847-1857 (2012) |
| j1 | | Yusaku Kaneta, Hiroki Arimura, Rajeev Raman: Faster bit-parallel algorithms for unordered pseudo-tree matching and tree homeomorphism. J. Discrete Algorithms 14: 119-135 (2012) |
| c4 | | Kunihiro Wasa, Yusaku Kaneta, Takeaki Uno, Hiroki Arimura: Constant Time Enumeration of Bounded-Size Subtrees in Trees and Its Application. COCOON 2012: 347-359 |
| 2010 | ||
| c3 | | Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga: Dynamic reconfigurable bit-parallel architecture for large-scale regular expression matching. FPT 2010: 21-28 |
| c2 | | Yusaku Kaneta, Hiroki Arimura: Faster Bit-Parallel Algorithms for Unordered Pseudo-tree Matching and Tree Homeomorphism. IWOCA 2010: 68-81 |
| c1 | | Yusaku Kaneta, Shin-ichi Minato, Hiroki Arimura: Fast Bit-Parallel Matching for Network and Regular Expressions. SPIRE 2010: 372-384 |
| 1 | Hiroki Arimura | |
| 2 | Shin-ichi Minato | |
| 3 | Yoshikazu Miyanaga | |
| 4 | Rajeev Raman | |
| 5 | Takeaki Uno | |
| 6 | Kunihiro Wasa | |
| 7 | Shingo Yoshizawa |
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