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 | 2009 | |
|---|---|---|
| j2 |      | S. M. Kang, T. I. Shin, Duc V. Dinh, J. H. Yang, S.-W. Kim, D. H. Yoon: Synthesis of GaN nanowires and nanorods via self-growth mode control. Microelectronics Journal 40(2): 373-376 (2009) |
| 1997 | ||
| c4 | | A. Dharchoudhuri, S. M. Kang: Analytical Fast Timing Simulation of MOS Circuits Driving RC Interconnects. VLSI Design 1997: 111-117 |
| 1993 | ||
| c3 |  | Dae-Hyung Cho, S. M. Kang: An Accurate AC Characteristic Table Look-up Model for VLSI Analog Circuits Simulation Applications. ISCAS 1993: 1531-1534 |
| 1989 | ||
| c2 | | Andrew T. Yang, S. M. Kang: iSMILE: A Novel Circuit Simulation Program with Emphasis on New Device Model Development. DAC 1989: 630-633 |
| 1988 | ||
| j1 | | Wei Shu, Min-You Wu, S. M. Kang: Improved net merging method for gate matrix layout. IEEE Trans. on CAD of Integrated Circuits and Systems 7(9): 947-951 (1988) |
| 1986 | ||
| c1 | | R. D. Freeman, S. M. Kang, C. G. Lin-Hendel, M. L. Newby: Automated extraction of SPICE circuit models from symbolic gate matrix layout with pruning. DAC 1986: 418-424 |
| 1 | Dae-Hyung Cho | |
| 2 | A. Dharchoudhuri | |
| 3 | Duc V. Dinh | |
| 4 | R. D. Freeman | |
| 5 | S.-W. Kim | |
| 6 | C. G. Lin-Hendel | |
| 7 | M. L. Newby | |
| 8 | T. I. Shin | |
| 9 | Wei Shu | |
| 10 | Min-You Wu | |
| 11 | Andrew T. Yang | |
| 12 | J. H. Yang | |
| 13 | D. H. Yoon |
Colors in the list of coauthors
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