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 | 2012 | |
|---|---|---|
| c6 |      | Ulya R. Karpuzcu, Krishna B. Kolluru, Nam Sung Kim, Josep Torrellas: VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages. DSN 2012: 1-11 |
| 2010 | ||
| c5 | | Brian Greskamp, Ulya R. Karpuzcu, Josep Torrellas: LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores. HPCA 2010: 1-12 |
| 2009 | ||
| c4 | | Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu, Siva Kumar Sastry Hari, Sarita V. Adve: Accurate microarchitecture-level fault modeling for studying hardware faults. HPCA 2009: 105-116 |
| c3 | | Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles: Blueshift: Designing processors for timing speculation from the ground up. HPCA 2009: 213-224 |
| c2 | | Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas: The BubbleWrap many-core: popping cores for sequential acceleration. MICRO 2009: 447-458 |
| 2005 | ||
| c1 | | Ulya R. Karpuzcu: Automatic verilog code generation through grammatical evolution. GECCO Workshops 2005: 394-397 |
| 1 | Sarita V. Adve | |
| 2 | Deming Chen | |
| 3 | Jeffrey J. Cook | |
| 4 | Brian Greskamp | |
| 5 | Siva Kumar Sastry Hari | |
| 6 | Nam Sung Kim | |
| 7 | Krishna B. Kolluru | |
| 8 | Man-Lap Li | |
| 9 | Pradeep Ramachandran | |
| 10 | Josep Torrellas | |
| 11 | Lu Wan | |
| 12 | Craig B. Zilles |
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