| 2013 | ||
|---|---|---|
| e1 | Hironori Kasahara, Keiji Kimura (Eds.): Languages and Compilers for Parallel Computing, 25th International Workshop, LCPC 2012, Tokyo, Japan, September 11-13, 2012, Revised Selected Papers. Lecture Notes in Computer Science 7760, Springer 2013, isbn 978-3-642-37657-3 | |
| 2012 | ||
| c31 | Yasir I. M. Al-Dosary, Keiji Kimura, Hironori Kasahara, Seinosuke Narita: Enhancing the performance of a multiplayer game by using a parallelizing compiler. CGAMES 2012: 67-75 | |
| 2011 | ||
| j11 | Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima: A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core. IEICE Transactions 94-C(4): 663-669 (2011) | |
| j10 | Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara: A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture. T. HiPEAC 4: 215-233 (2011) | |
| c30 | Hiroki Mikami, Shumpei Kitaki, Masayoshi Mase, Akihiro Hayashi, Mamoru Shimaoka, Keiji Kimura, Masato Edahiro, Hironori Kasahara: Evaluation of Power Consumption at Execution of Multiple Automatically Parallelized and Power Controlled Media Applications on the RP2 Low-Power Multicore. LCPC 2011: 31-45 | |
| 2010 | ||
| c29 | Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, S. Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima: A 45nm 37.3GOPS/W heterogeneous multi-core SoC. ISSCC 2010: 100-101 | |
| c28 | Akihiro Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimura, Hironori Kasahara: Parallelizing Compiler Framework and API for Power Reduction and Software Productivity of Real-Time Heterogeneous Multicores. LCPC 2010: 184-198 | |
| 2009 | ||
| c27 | Fumiyo Takano, Yoshitaka Maekawa, Hironori Kasahara: Multiple-Paths Search with Concurrent Thread Scheduling for Fast AND/OR Tree Search. CISIS 2009: 51-58 | |
| c26 | Masafumi Onouchi, Keisuke Toyama, Tohru Nojiri, Makoto Sato, Masayoshi Mase, Jun Shirako, Mikiko Sato, Masashi Takada, Masayuki Ito, Hiroyuki Mizuno, Mitaro Namiki, Keiji Kimura, Hironori Kasahara: Green Multicore-SoC Software-Execution Framework with Timely-Power-Gating Scheme. ICPP 2009: 510-517 | |
| c25 | Keiji Kimura, Masayoshi Mase, Hiroki Mikami, Takamichi Miyamoto, Jun Shirako, Hironori Kasahara: OSCAR API for Real-Time Low-Power Multicores and Its Performance on Multicores and SMP Servers. LCPC 2009: 188-202 | |
| 2008 | ||
| j9 | Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara: Power-Aware Compiler Controllable Chip Multiprocessor. IEICE Transactions 91-C(4): 432-439 (2008) | |
| c24 | Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka, Akihiro Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara: Software-cooperative power-efficient heterogeneous multi-core for media processing. ASP-DAC 2008: 736-741 | |
| c23 | Takamichi Miyamoto, Saori Asaka, Hiroki Mikami, Masayoshi Mase, Yasutaka Wada, Hirofumi Nakano, Keiji Kimura, Hironori Kasahara: Parallelization with Automatic Parallelizing Compiler Generating Consumer Electronics Multicore API. ISPA 2008: 600-607 | |
| 2007 | ||
| c22 | Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara: Power-Aware Compiler Controllable Chip Multiprocessor. PACT 2007: 427 | |
| c21 | Jun Shirako, Hironori Kasahara, Vivek Sarkar: Language Extensions in Support of Compiler Parallelization. LCPC 2007: 78-94 | |
| 2005 | ||
| c20 | Keiji Kimura, Yasutaka Wada, Hirofumi Nakano, Takeshi Kodaka, Jun Shirako, Kazuhisa Ishizaka, Hironori Kasahara: Multigrain parallel processing on compiler cooperative chip multiprocessor. Interaction between Compilers and Computer Architectures 2005: 11-20 | |
| c19 | Jun Shirako, Munehiro Yoshida, Naoto Oshiyama, Yasutaka Wada, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara: Performance Evaluation of Compiler Controlled Power Saving Scheme. ISHPC 2005: 480-493 | |
| c18 | Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara: Compiler Control Power Saving Scheme for Multi Core Processors. LCPC 2005: 362-376 | |
| 2004 | ||
| c17 | Kazuhisa Ishizaka, Takamichi Miyamoto, Jun Shirako, Motoki Obata, Keiji Kimura, Hironori Kasahara: Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers. LCPC 2004: 319-331 | |
| c16 | Jun Shirako, Kouhei Nagasawa, Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara: Selective inline expansion for improvement of multi grain parallelism. Parallel and Distributed Computing and Networks 2004: 476-482 | |
| 2003 | ||
| j8 | Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara: Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP. International Journal of Parallel Programming 31(3): 211-223 (2003) | |
| c15 | Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara: Cache Optimization for Coarse Grain Task Parallel Processing Using Inter-Array Padding. LCPC 2003: 64-76 | |
| 2002 | ||
| j7 | Shuji Hashimoto, Seinosuke Narita, Hironori Kasahara, Katsuhiko Shirai, Atsuo Kobayashi, Atsuo Takanishi, Shigeki Sugano, Jin'ichi Yamaguchi, Hideyuki Sawada, Hideaki Takanobu, Koji Shibuya, Toshio Morita, T. Kurata, N. Onoe, K. Ouchi, T. Noguchi, Yosihiro Niwa, Seikon Nagayama, Hirokazu Tabayashi, I. Matsui, Motoki Obata, H. Matsuzaki, A. Murasugi, Tetsunori Kobayashi, S. Haruyama, Tetsuhiko Okada, Y. Hidaki, Yuichi Taguchi, Keiichiro Hoashi, Emi Morikawa, Yuri Iwano, D. Araki, J. Suzuki, Masao Yokoyama, I. Dawa, Daisuke Nishino, Sadatoshi Inoue, T. Hirano, Eiji Soga, S. Gen, T. Yanada, Keisuke Kato, S. Sakamoto, Y. Ishii, Shigeru Matsuo, Yousuke Yamamoto, Kensuke Sato, T. Hagiwara, T. Ueda, N. Honda, Kazuo Hashimoto, T. Hanamoto, S. Kayaba, Takuya Kojima, Hiroyasu Iwata, H. Kubodera, R. Matsuki, T. Nakajima, K. Nitto, D. Yamamoto, Y. Kamizaki, S. Nagaike, Y. Kunitake, Satoshi Morita: Humanoid Robots in Waseda University-Hadaly-2 and WABIAN. Auton. Robots 12(1): 25-38 (2002) | |
| c14 | Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara: Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP. ISHPC 2002: 479-489 | |
| c13 | Motoki Obata, Jun Shirako, Hiroki Kaminaga, Kazuhisa Ishizaka, Hironori Kasahara: Hierarchical Parallelism Control for Multigrain Parallel Processing. LCPC 2002: 31-44 | |
| c12 | Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka, Keiji Kimura, Hiroki Kaminaga, Hirofumi Nakano, Kouhei Nagasawa, Akiko Murai, Hiroki Itagaki, Jun Shirako: Multigrain Automatic Parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler. PARELEC 2002: 105-111 | |
| 2001 | ||
| c11 | Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara: Coarse Grain Task Parallel Processing with Cache Optimization on Shared Memory Multiprocessor. LCPC 2001: 352-365 | |
| 2000 | ||
| c10 | Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara: Coarse-Grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler. ISHPC 2000: 457-470 | |
| c9 | Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka: Automatic Coarse Grain Task Parallel Processing on SMP Using OpenMP. LCPC 2000: 189-207 | |
| c8 | Takao Tobita, Masayoshi Kouda, Hironori Kasahara: Performance Evaluation of Minimum Execution Time Multiprocessor Scheduling Algorithms Using Standard Task Graph Set. PDPTA 2000 | |
| 1998 | ||
| j6 | Hironori Kasahara, Akimasa Yoshida: A Data-Localization Compilation Scheme Using Partial-Static Task Assignment for Fortran Coarse-Grain Parallel Processing. Parallel Computing 24(3-4): 579-596 (1998) | |
| c7 | Kento Aida, Hironori Kasahara, Seinosuke Narita: Job Scheduling Scheme for Pure Space Sharing Among Rigid Jobs. JSSPP 1998: 98-121 | |
| 1996 | ||
| c6 | Akimasa Yoshida, Kenichi Koshizuka, Hironori Kasahara: Data-Localization for Fortran Macro-Dataflow Computation Using Partial Static Task Assignment. International Conference on Supercomputing 1996: 61-68 | |
| c5 | Akimasa Yoshida, Hironori Kasahara: Data Localization Using Loop Aligned Decomposition for Macro-Dataflow Processing. LCPC 1996: 56-74 | |
| 1992 | ||
| j5 | Hironori Kasahara, Atsusi Itoh, Hisamitsu Tanaka, Keisuke Itoh: A parallel optimization algorithm for minimum execution-time multiprocessor scheduling problem. Systems and Computers in Japan 23(13): 54-65 (1992) | |
| 1991 | ||
| j4 | Hiroki Honda, Hironori Kasahara, Hironori Kasahara, Seinosuke Narita: Parallel processing scheme of a basic block in a fortran program on oscar. Systems and Computers in Japan 22(11): 1-13 (1991) | |
| j3 | Hiroki Honda, Hironori Kasahara, Hironori Kasahara, Seinosuke Narita: Parallel processing scheme of a basic block in a fortran program on oscar. Systems and Computers in Japan 22(11): 1-13 (1991) | |
| j2 | Hiroki Honda, Hironori Kasahara: Coarse grain parallelism detection scheme of a fortran program. Systems and Computers in Japan 22(12): 24-36 (1991) | |
| c4 | Hironori Kasahara, Wichian Premchaiswadi, Mikio Tamura, Yoshinori Maekawa, Seinosuke Narita: Parallel Processing of Sparse Matrix Solution Using Fine Grain Tasks on OSCAR. ICPP (3) 1991: 322-323 | |
| c3 | Hironori Kasahara, Hiroki Honda, A. Mogi, A. Ogura, K. Fujiwara, Seinosuke Narita: A Multi-Grain Parallelizing Compilation Scheme for OSCAR (Optimally Scheduled Advanced Multiprocessor). LCPC 1991: 283-297 | |
| 1990 | ||
| c2 | Hironori Kasahara, Hiroki Honda, M. Iwata, M. Hirota: A Compilation Scheme for Macro-Dataflow Computation on Hierarchical Multiprocessor Systems. ICPP (2) 1990: 294-295 | |
| c1 | Hironori Kasahara, Hiroki Honda, Seinosuke Narita: Parallel processing of near fine grain tasks using static scheduling OSCAR (optimally scheduled advanced multiprocessor). SC 1990: 856-864 | |
| 1984 | ||
| j1 | Hironori Kasahara, Seinosuke Narita: Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing. IEEE Trans. Computers 33(11): 1023-1029 (1984) | |
Colors in the list of coauthors
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