Ryan Kastner

Lingjuan Wu, Ryan Kastner, Bo Gu, Dunshan Yu: Design of a Reconfigurable Acoustic Modem for Underwater Sensor Networks. IEICE Transactions 96-A(4): 821-823 (2013)

Jonathan Valamehr, Timothy Sherwood, Ryan Kastner, David Marangoni-Simonsen, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin: A 3-D Split Manufacturing Approach to Trustworthy System Development. IEEE Trans. on CAD of Integrated Circuits and Systems 32(4): 611-615 (2013)

Jason Oberg, Sarah Meiklejohn, Timothy Sherwood, Ryan Kastner: A practical testing framework for isolating hardware timing channels. DATE 2013: 1281-1284

Lingjuan Wu, Jennifer Trezzo, Diba Mirza, Paul Roberts, Jules Jaffe, Yangyuan Wang, Ryan Kastner: Designing an Adaptive Acoustic Modem for Underwater Sensor Networks. Embedded Systems Letters 4(1): 1-4 (2012)

Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, Ryan Kastner: On the Complexity of Generating Gate Level Information Flow Tracking Logic. IEEE Transactions on Information Forensics and Security 7(3): 1067-1080 (2012)

Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine, Ryan Kastner, Çetin Kaya Koç, Timothy E. Levin, Timothy Sherwood: A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors. Cryptography and Security 2012: 364-382

Matthew Jacobsen, Yoav Freund, Ryan Kastner: RIFFA: A Reusable Integration Framework for FPGA Accelerators. FCCM 2012: 216-219

Pingfan Meng, Matthew Jacobsen, Ryan Kastner: FPGA-GPU-CPU heterogenous architecture for real-time cardiac physiological optical mapping. FPT 2012: 37-42

Janarbek Matai, Pingfan Meng, Lingjuan Wu, Brad T. Weals, Ryan Kastner: Designing a hardware in the loop wireless digital channel emulator for software defined radio. FPT 2012: 206-214

Ryan Kastner, Albert Lin, Curt Schurgers, Jules Jaffe, Peter Franks, Brent S. Stewart: Sensor platforms for multimodal underwater monitoring. IGCC 2012: 1-7

Wei Hu, Jason Oberg, Dejun Mu, Ryan Kastner: Simultaneous information flow security and circuit redundancy in Boolean gates. ICCAD 2012: 585-590

Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, Ryan Kastner: Theoretical Fundamentals of Gate Level Information Flow Tracking. IEEE Trans. on CAD of Integrated Circuits and Systems 30(8): 1128-1140 (2011)

Ali Irturk, Janarbek Matai, Jason Oberg, Jeffrey Su, Ryan Kastner: Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 30(8): 1173-1183 (2011)

Bridget Benson, Arash Arfaee, Choon Kim, Ryan Kastner, Rajesh K. Gupta: Integrating Embedded Computing Systems Into High School and Early Undergraduate Education. IEEE Trans. Education 54(2): 197-202 (2011)

Christopher Barngrover, Serge Belongie, Ryan Kastner: JBoost Optimization of Color Detectors for Autonomous Underwater Vehicle Navigation. CAIP (2) 2011: 155-162

Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner: Information flow isolation in I2C and USB. DAC 2011: 254-259

Janarbek Matai, Ali Irturk, Ryan Kastner: Design and Implementation of an FPGA-Based Real-Time Face Recognition System. FCCM 2011: 97-100

Mohit Tiwari, Jason Oberg, Xun Li, Jonathan Valamehr, Timothy E. Levin, Ben Hardekopf, Ryan Kastner, Frederic T. Chong, Timothy Sherwood: Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security. ISCA 2011: 189-200

Bridget Benson, Ying Li, Brian Faunce, Kenneth Domond, Don Kimball, Curt Schurgers, Ryan Kastner: Design of a Low-Cost Underwater Acoustic Modem. Embedded Systems Letters 2(3): 58-61 (2010)

Shahnam Mirzaei, Ryan Kastner, Anup Hosangadi: Layout Aware Optimization of High Speed Fixed Coefficient FIR Filters for FPGAs. Int. J. Reconfig. Comp. 2010 (2010)

Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner: GUSTO: An automatic generation and optimization tool for matrix inversion architectures. ACM Trans. Embedded Comput. Syst. 9(4) (2010)

Ted Huffmire, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner: Security Primitives for Reconfigurable Hardware-Based Systems. TRETS 3(2): 10 (2010)

Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin: Hardware assistance for trustworthy systems through 3-D integration. ACSAC 2010: 199-210

Ted Huffmire, Timothy E. Levin, Michael Bilzor, Cynthia E. Irvine, Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner: Hardware trust implications of 3-D integration. WESS 2010: 1

Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner: Theoretical analysis of gate level information flow tracking. DAC 2010: 244-247

Daniel Hefenbrock, Jason Oberg, Nhat Thanh, Ryan Kastner, Scott B. Baden: Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs. FCCM 2010: 11-18

Junguk Cho, Bridget Benson, Sunsern Cheamanunkul, Ryan Kastner: Increased Performace of FPGA-Based Color Classification System. FCCM 2010: 29-32

Deborah Goshorn, Junguk Cho, Ryan Kastner, Shahnam Mirzaei: Field Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications. FPL 2010: 582-587

Ying Li, Xing Zhang, Bridget Benson, Ryan Kastner: Hardware Implementation of Symbol Synchronization for Underwater FSK. SUTC/UMC 2010: 82-88

Feng Tong, Bridget Benson, Ying Li, Ryan Kastner: Channel Equalization Based on Data Reuse LMS Algorithm for Shallow Water Acoustic Communication. SUTC/UMC 2010: 95-98

Junguk Cho, Bridget Benson, Shahnam Mirzaei, Ryan Kastner: Parallelized Architecture of Multiple Classifiers for Face Detection. ASAP 2009: 75-82

Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan Fallah, Ryan Kastner: Xquasher: a tool for efficient computation of multiple linear expressions. DAC 2009: 254-257

Ying Li, Bridget Benson, Ryan Kastner, Xing Zhang: Bit Error Rate, Power and Area Analysis of Multiple FPGA Implementations of Underwater FSK. ERSA 2009: 136-142

Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kastner: Fpga-based face detection system using Haar classifiers. FPGA 2009: 103-112

Bridget Benson, Ali Irturk, Junguk Cho, Ryan Kastner: Energy benefits of reconfigurable hardware for use in underwater sensor nets. IPDPS 2009: 1-7

Junguk Cho, Bridget Benson, Ryan Kastner: Hardware acceleration of multi-view face detection. SASP 2009: 66-69

Ali Irturk, Bridget Benson, Nikolay Laptev, Ryan Kastner: Architectural optimization of decomposition algorithms for wireless communication systems. WCNC 2009: 3035-3040

Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timothy E. Levin: Enforcing memory policy specifications in reconfigurable hardware. Computers & Security 27(5-6): 197-215 (2008)

Ted Huffmire, Brett Brotherton, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine: Managing Security in FPGA-Based Embedded Systems. IEEE Design & Test of Computers 25(6): 590-598 (2008)

Ted Huffmire, Brett Brotherton, Nick Callegari, Jonathan Valamehr, Jeff White, Ryan Kastner, Timothy Sherwood: Designing secure systems on reconfigurable hardware. ACM Trans. Design Autom. Electr. Syst. 13(3) (2008)

Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T. Weals, Richard E. Cagley: Design space exploration of a cooperative MIMO receiver for reconfigurable architectures. ASAP 2008: 167-172

Ryan Kastner, Ted Huffmire: Threats and Challenges in Reconfigurable Hardware Security. ERSA 2008: 334-345

Ali Irturk, Bridget Benson, Arash Arfaee, Ryan Kastner: Automatic generation of decomposition based matrix inversion architectures. FPT 2008: 373-376

Ted Huffmire, Jonathan Valamehr, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine: Trustworthy System Security through 3-D Integrated Hardware. HOST 2008: 91-92

Bridget Benson, Ali Irturk, Junguk Cho, Ryan Kastner: Survey of hardware platforms for an energy efficient implementation of matching pursuits algorithm for shallow water networks. Underwater Networks 2008: 83-86

Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner: An FPGA Design Space Exploration Tool for Matrix Inversion Architectures. SASP 2008: 42-47

Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner: Ant Colony Optimizations for Resource- and Timing-Constrained Operation Scheduling. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1010-1029 (2007)

Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner: Exploring time/resource trade-offs by solving dual scheduling problems with the ant colony optimization. ACM Trans. Design Autom. Electr. Syst. 12(4) (2007)

Anup Hosangadi, Farzan Fallah, Ryan Kastner: Algebraic Methods for Optimizing Constant Multiplications in Linear Systems. VLSI Signal Processing 49(1): 31-50 (2007)

Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan Kastner, Frederic T. Chong: Combining static and dynamic defect-tolerance techniques for nanoscale memory systems. ICCAD 2007: 773-778

Ted Huffmire, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine: Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems. IEEE Symposium on Security and Privacy 2007: 281-295

Richard E. Cagley, Brad T. Weals, Scott A. McNally, Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner: Implementation of the Alamouti OSTBC to a Distributed Set of Single-Antenna Wireless Nodes. WCNC 2007: 577-581

Gang Wang, Wenrui Gong, Ryan Kastner: Application partitioning on programmable platforms using the ant colony optimization. J. Embedded Computing 2(1): 119-136 (2006)

Anup Hosangadi, Farzan Fallah, Ryan Kastner: Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2012-2022 (2006)

Gang Wang, Satish Sivaswamy, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Elaheh Bozorgzadeh: Statistical Analysis and Design of HARP FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2088-2102 (2006)

Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner: Design space exploration using time and resource duality with the ant colony optimization. DAC 2006: 451-454

Yan Meng, Timothy Sherwood, Ryan Kastner: Leakage power reduction of embedded memories on FPGAs through location assignment. DAC 2006: 612-617

Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh: Layout driven data communication optimization for high level synthesis. DATE 2006: 1185-1190

Anup Hosangadi, Farzan Fallah, Ryan Kastner: Optimizing high speed arithmetic circuits using three-term extraction. DATE 2006: 1294-1299

Ted Huffmire, Shreyas Prasad, Timothy Sherwood, Ryan Kastner: Policy-Driven Memory Protection for Reconfigurable Hardware. ESORICS 2006: 461-478

Gang Wang, Wenrui Gong, Ryan Kastner: Defect-Tolerant Nanocomputing Using Bloom Filters. FCCM 2006: 277-278

Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner: High speed FIR filter implementation using add and shift method. FPGA 2006: 231

Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner, Richard E. Cagley, Brad T. Weals: Carrier Offset and Channel Estimation for Cooperative MIMO Sensor Networks. GLOBECOM 2006

Gang Wang, Wenrui Gong, Ryan Kastner: On the use of Bloom filters for defect maps in nanocomputing. ICCAD 2006: 743-746

Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner: FPGA Implementation of High Speed FIR Filters Using Add and Shift Method. ICCD 2006

Bridget Benson, Grace Chang, Derek Manov, Brian Graham, Ryan Kastner: Design of a low-cost acoustic modem for moored oceanographic applications. Underwater Networks 2006: 71-78

Yan Meng, Wenrui Gong, Ryan Kastner, Timothy Sherwood: Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator. J. Low Power Electronics 1(3): 238-248 (2005)

Yan Meng, Timothy Sherwood, Ryan Kastner: Exploring the limits of leakage power reduction in caches. TACO 2(3): 221-246 (2005)

Seda Ogrenci Memik, Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh: A scheduling algorithm for optimization and early planning in high-level synthesis. ACM Trans. Design Autom. Electr. Syst. 10(1): 33-57 (2005)

Anup Hosangadi, Farzan Fallah, Ryan Kastner: Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions. ASP-DAC 2005: 523-528

Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timothy Sherwood, Hua Lee, Ryan Kastner: MP core: algorithm and design techniques for efficient channel estimation in wireless applications. DAC 2005: 297-302

Wenrui Gong, Yan Meng, Gang Wang, Ryan Kastner, Timothy Sherwood: Data Partitioning and Optimizations for Reconfigurable Architectures. ERSA 2005: 239-242

Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Eli Bozorgzadeh: HARP: hard-wired routing pattern FPGAs. FPGA 2005: 21-29

Gang Wang, Wenrui Gong, Ryan Kastner: Instruction scheduling using MAX-MIN ant system optimization. ACM Great Lakes Symposium on VLSI 2005: 44-49

Yan Meng, Timothy Sherwood, Ryan Kastner: On the Limits of Leakage Power Reduction in Caches. HPCA 2005: 154-165

Wenrui Gong, Gang Wang, Ryan Kastner: Storage assignment during high-level synthesis for configurable architectures. ICCAD 2005: 3-6

Andrew P. Brown, Ronald A. Iltis, Ryan Kastner: Efficient distributed algorithms for data fusion and node localization in mobile ad-hoc networks. MASS 2005

Anup Hosangadi, Farzan Fallah, Ryan Kastner: Energy Efficient Hardware Synthesis of Polynomial Expressions. VLSI Design 2005: 653-658

Ankur Srivastava, Ryan Kastner, Chunhong Chen, Majid Sarrafzadeh: Timing driven gate duplication. IEEE Trans. VLSI Syst. 12(1): 42-51 (2004)

Anup Hosangadi, Farzan Fallah, Ryan Kastner: Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis. ASAP 2004: 202-212

Wenrui Gong, Gang Wang, Ryan Kastner: A High Performance Application Representation for Reconfigurable Systems. ERSA 2004: 218-224

Anup Hosangadi, Farzan Fallah, Ryan Kastner: Factoring and eliminating common subexpressions in polynomial expressions. ICCAD 2004: 169-174

Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh: Creating and exploiting flexibility in rectilinear Steiner trees. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 605-615 (2003)

Xiaojian Yang, Maogang Wang, Ryan Kastner, Soheil Ghiasi, Majid Sarrafzadeh: Congestion reduction during placement with provably good approximation bound. ACM Trans. Design Autom. Electr. Syst. 8(3): 316-333 (2003)

Adam Kaplan, Philip Brisk, Ryan Kastner: Data communication estimation and reduction for reconfigurable systems. DAC 2003: 616-621

Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh: Congestion estimation during top-down placement. IEEE Trans. on CAD of Integrated Circuits and Systems 21(1): 72-80 (2002)

Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh: Pattern routing: use and theory for increasing predictability andavoiding coupling. IEEE Trans. on CAD of Integrated Circuits and Systems 21(7): 777-790 (2002)

Ryan Kastner, Adam Kaplan, Seda Ogrenci Memik, Elaheh Bozorgzadeh: Instruction generation for hybrid reconfigurable systems. ACM Trans. Design Autom. Electr. Syst. 7(4): 605-627 (2002)

Philip Brisk, Adam Kaplan, Ryan Kastner, Majid Sarrafzadeh: Instruction generation and regularity extraction for reconfigurable processors. CASES 2002: 262-269

Ryan Kastner, Christina Hsieh, Miodrag Potkonjak, Majid Sarrafzadeh: On the Sensitivity of Incremental Algorithms for Combinatorial Auctions. WECWIS 2002: 81-88

Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh: On the complexity of gate duplication. IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1170-1176 (2001)

Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh: Creating and Exploiting Flexibility in Steiner Trees. DAC 2001: 195-198

Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh: Instruction Generation for Hybrid Reconfigurable Systems. ICCAD 2001: 127-

Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh: A Super-Scheduler for Embedded Reconfigurable Systems. ICCAD 2001: 391-

Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh: Congestion Reduction During Placement Based on Integer Programming. ICCAD 2001: 573-576

Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh: An exact algorithm for coupling-free routing. ISPD 2001: 10-15

Majid Sarrafzadeh, Elaheh Bozorgzadeh, Ryan Kastner, Ankur Srivastava: Design and analysis of physical design algorithms. ISPD 2001: 82-89

Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh: Congestion estimation during top-down placement. ISPD 2001: 164-169

Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh: 3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. Design Autom. for Emb. Sys. 5(3-4): 329-338 (2000)

Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh: Fast Template Placement for Reconfigurable Computing Systems. IEEE Design & Test of Computers 17(1): 68-83 (2000)

Kia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh: A C to Hardware/Software Compiler. FCCM 2000: 331-332

Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh: Predictable Routing. ICCAD 2000: 110-113

Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh: Timing Driven Gate Duplication: Complexity Issues and Algorithms. ICCAD 2000: 447-450

Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh: 3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. IEEE International Workshop on Rapid System Prototyping 1999: 38-