Kurt Keutzer

Mark Murphy, Marcus Alley, James Demmel, Kurt Keutzer, Shreyas Vasanawala, Michael Lustig: Fast $\ell_1$ -SPIRiT Compressed Sensing Parallel Imaging MRI: Scalable Parallel Implementation and Clinically Feasible Runtime. IEEE Trans. Med. Imaging 31(6): 1250-1262 (2012)

David Sheffield, Michael J. Anderson, Kurt Keutzer: Automatic generation of application-specific accelerators for FPGAs from python loop nests. FPL 2012: 567-570

Bor-Yiing Su, Kurt Keutzer: clSpMV: A Cross-Platform OpenCL SpMV Framework on GPUs. ICS 2012: 353-364

Michael J. Anderson, David Sheffield, Kurt Keutzer: A Predictive Model for Solving Small Linear Algebra Problems in GPU Registers. IPDPS 2012: 2-13

Victor Pankratius, Wolfram Schulte, Kurt Keutzer: Guest Editors' Introduction: Parallelism on the Desktop. IEEE Software 28(1): 14-16 (2011)

Kurt Keutzer, Peng Li, Li Shang, Hai Zhou: A Special Section on Multicore Parallel CAD: Algorithm Design and Programming. ACM Trans. Design Autom. Electr. Syst. 16(3): 21 (2011)

Michael J. Anderson, Bryan C. Catanzaro, Jike Chong, Ekaterina Gonina, Kurt Keutzer, Chao-Yue Lai, Mark Murphy, Bor-Yiing Su, Narayanan Sundaram: PALLAS: Mapping Applications onto Manycore. Multiprocessor System-on-Chip 2011: 89-113

Ekaterina Gonina, Gerald Friedland, Henry Cook, Kurt Keutzer: Fast speaker diarization using a high-level scripting language. ASRU 2011: 553-558

Narayanan Sundaram, Kurt Keutzer: Long term video segmentation through pixel level spectral clustering on GPUs. ICCV Workshops 2011: 475-482

Michael J. Anderson, Grey Ballard, James Demmel, Kurt Keutzer: Communication-Avoiding QR Decomposition for GPUs. IPDPS 2011: 48-58

S. S. Vasanawala, M. J. Murphy, M. T. Alley, P. Lai, Kurt Keutzer, John M. Pauly, Michael Lustig: Practical parallel imaging compressed sensing MRI: Summary of two years of experience in accelerating body MRI of pediatric patients. ISBI 2011: 1039-1043

Youngmin Yi, Chao-Yue Lai, Slav Petrov, Kurt Keutzer: Efficient Parallel CKY Parsing on GPUs. IWPT 2011: 175-185

Bryan C. Catanzaro, Michael Garland, Kurt Keutzer: Copperhead: compiling an embedded data parallel language. PPOPP 2011: 47-56

Bor-Yiing Su, Tasneem G. Brutch, Kurt Keutzer: A parallel region based object recognition system. WACV 2011: 81-88

Bryan C. Catanzaro, Kurt Keutzer: Parallel computing with patterns and frameworks. ACM Crossroads 17(1): 22-27 (2010)

Bryan C. Catanzaro, Armando Fox, Kurt Keutzer, David A. Patterson, Bor-Yiing Su, Marc Snir, Kunle Olukotun, Pat Hanrahan, Hassan Chafi: Ubiquitous Parallel Computing from Berkeley, Illinois, and Stanford. IEEE Micro 30(2): 41-55 (2010)

Narayanan Sundaram, Thomas Brox, Kurt Keutzer: Dense Point Trajectories by GPU-Accelerated Large Displacement Optical Flow. ECCV (1) 2010: 438-451

Bor-Yiing Su, Tasneem G. Brutch, Kurt Keutzer: Parallel BFS graph traversal on images using structured grid. ICIP 2010: 4489-4492

Jike Chong, Ekaterina Gonina, Kisun You, Kurt Keutzer: Exploring recognition network representations for efficient speech inference on highly parallel platforms. INTERSPEECH 2010: 1489-1492

Dorothea Kolossa, Jike Chong, Steffen Zeiler, Kurt Keutzer: Efficient manycore CHMM speech recognition for audiovisual and multistream data. INTERSPEECH 2010: 2698-2701

Krste Asanovic, Rastislav Bodík, James Demmel, Tony Keaveny, Kurt Keutzer, John Kubiatowicz, Nelson Morgan, David A. Patterson, Koushik Sen, John Wawrzynek, David Wessel, Katherine A. Yelick: A view of the parallel computing landscape. Commun. ACM 52(10): 56-67 (2009)

Kurt Keutzer, Peng Li, Li Shang, Hai Zhou: ACM Transactions on Design Automation of Electronic Systems (TODAES) special section call for papers: Parallel CAD: Algorithm design and programming. ACM Trans. Design Autom. Electr. Syst. 15(1) (2009)

Nadathur Satish, Narayanan Sundaram, Kurt Keutzer: Optimizing the use of GPU memory in applications with large data sets. HiPC 2009: 408-418

Bryan C. Catanzaro, Bor-Yiing Su, Narayanan Sundaram, Yunsup Lee, Mark Murphy, Kurt Keutzer: Efficient, high-quality image contour detection. ICCV 2009: 2381-2388

Jike Chong, Kisun You, Youngmin Yi, Ekaterina Gonina, Christopher Hughes, Wonyong Sung, Kurt Keutzer: Scalable HMM based inference engine in large vocabulary continuous speech recognition. ICME 2009: 1797-1800

Mark Murphy, Kurt Keutzer, Hong Wang: Image feature extraction for mobile processors. IISWC 2009: 138-147

Jike Chong, Ekaterina Gonina, Youngmin Yi, Kurt Keutzer: A fully data parallel WFST-based large vocabulary continuous speech recognition on a graphics processing unit. INTERSPEECH 2009: 1183-1186

Matthew Dixon, Jike Chong, Kurt Keutzer: Acceleration of market value-at-risk estimation. SC-WHPCF 2009

Wen-mei W. Hwu, Kurt Keutzer, Timothy G. Mattson: The Concurrency Challenge. IEEE Design & Test of Computers 25(4): 312-320 (2008)

Bryan C. Catanzaro, Kurt Keutzer, Bor-Yiing Su: Parallelizing CAD: a timely research agenda for EDA. DAC 2008: 12-17

Sachin S. Sapatnekar, Eshel Haritan, Kurt Keutzer, Anirudh Devgan, Desmond Kirkpatrick, Stephen Meier, Duaine Pryor, Tom Spyrou: Reinventing EDA with manycore processors. DAC 2008: 126-127

Nadathur Satish, Kaushik Ravindran, Kurt Keutzer: Scheduling task dependence graphs with variable task execution times onto heterogeneous multiprocessors. EMSOFT 2008: 149-158

Joel Phillips, Kurt Keutzer, Michael Wrinn: Architecting parallel programs. ICCAD 2008: 4

Bryan C. Catanzaro, Narayanan Sundaram, Kurt Keutzer: Fast support vector machine training and classification on graphics processors. ICML 2008: 104-111

Kurt Keutzer, Kaushik Ravindran: Technology Mapping. Encyclopedia of Algorithms 2008

David G. Chinnery, Kurt Keutzer: Closing the Power Gap between ASIC and Custom - Tools and Techniques for Low Power Design. Springer 2007, isbn 978-0-387-25763-1, pp. I-XII, 1-384

Francine Bacchini, Greg Spirakis, Juan Antonio Carballo, Kurt Keutzer, Aart J. de Geus, Fu-Chieh Hsu, Kazu Yamada: Megatrends and EDA 2017. DAC 2007: 21-22

Nadathur Satish, Kaushik Ravindran, Kurt Keutzer: A decomposition-based constraint optimization approach for statically scheduling task graphs with communication delays to multiprocessors. DATE 2007: 57-62

Jike Chong, Nadathur Satish, Bryan C. Catanzaro, Kaushik Ravindran, Kurt Keutzer: Efficient Parallelization of H.264 Decoding with Macro Block Level Scheduling. ICME 2007: 1874-1877

Scott J. Weber, Kurt Keutzer: Using minimal minterms to represent programmability. CODES+ISSS 2005: 63-68

Yujia Jin, Nadathur Satish, Kaushik Ravindran, Kurt Keutzer: An automated exploration framework for FPGA-based soft multiprocessor systems. CODES+ISSS 2005: 273-278

David G. Chinnery, Kurt Keutzer: Closing the power gap between ASIC and custom: an ASIC perspective. DAC 2005: 275-280

Yujia Jin, William Plishker, Kaushik Ravindran, Nadathur Satish, Kurt Keutzer: Soft multiprocessor systems for network applications (abstract only). FPGA 2005: 271

Kaushik Ravindran, Nadathur Satish, Yujia Jin, Kurt Keutzer: An FPGA-based Soft Multiprocessor System for IPv4 Packet Forwarding. FPL 2005: 487-492

David G. Chinnery, Kurt Keutzer: Linear programming for sizing, V_th and V_dd assignment. ISLPED 2005: 149-154

David G. Chinnery, Kurt Keutzer: Closing the Gap Between ASIC and Custom - Tools and Techniques for High-Performance ASIC Design. Springer 2004, isbn 978-1-4020-7113-3, pp. I-XIV, 1-414

Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer: Static Crosstalk-Noise Analysis - For Deep Sub-Micron Digital Designs. Springer 2004, isbn 978-1-4020-8091-3, pp. I-XVIII, 1-113

Niraj Shah, William Plishker, Kaushik Ravindran, Kurt Keutzer: NP-Click: A Productive Software Development Approach for Network Processors. IEEE Micro 24(5): 45-54 (2004)

Scott J. Weber, Matthew W. Moskewicz, Matthias Gries, Christian Sauer, Kurt Keutzer: Fast cycle-accurate simulation and instruction set generation for constraint-based descriptions of programmable architectures. CODES+ISSS 2004: 18-23

Robert Dahlberg, Kurt Keutzer, R. Bingham, Aart J. de Geus, Walden C. Rhines: EDA: this is serious business. DAC 2004: 1

Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah: Is statistical timing statistically significant? DAC 2004: 498

Christian Sauer, Matthias Gries, José Ignacio Gómez, Scott J. Weber, Kurt Keutzer: Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express. PARELEC 2004: 129-134

Chidamber Kulkarni, Matthias Gries, Christian Sauer, Kurt Keutzer: Programming challenges in network processor deployment. CASES 2003: 178-187

Matthias Gries, Chidamber Kulkarni, Christian Sauer, Kurt Keutzer: Comparing Analytical Modeling with Simulation for Network Processors: A Case Study. DATE 2003: 20256-20261

Masayuki Ito, David G. Chinnery, Kurt Keutzer: Low Power Multiplication Algorithm for Switching Activity Reduction through Operand Decomposition. ICCD 2003: 21-

David Nguyen, Abhijit Davare, Michael Orshansky, David G. Chinnery, Brandon Thompson, Kurt Keutzer: Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization. ISLPED 2003: 158-163

Andrew Mihal, Chidamber Kulkarni, Matthew W. Moskewicz, Mel M. Tsai, Niraj Shah, Scott J. Weber, Yujia Jin, Kurt Keutzer, Christian Sauer, Kees A. Vissers, Sharad Malik: Developing Architectural Platforms: A Disciplined Approach. IEEE Design & Test of Computers 19(6): 6-16 (2002)

Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu: Impact of spatial intrachip gate length variability on theperformance of high-speed digital circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(5): 544-553 (2002)

Gary Smith, Daya Nadamuni, Sharad Malik, Rick Chapman, John Fogelin, Kurt Keutzer, Grant Martin, Brian Bailey: Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant? DAC 2002: 479

Michael Orshansky, Kurt Keutzer: A general probabilistic framework for worst case timing analysis. DAC 2002: 556-561

Wei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang, Xinping Zhu, David I. August, Kurt Keutzer, Sharad Malik, Li-Shiuan Peh: Design Tools for Application Specific Embedded Processors. EMSOFT 2002: 319-333

Pinhong Chen, Yuji Kukimoto, Kurt Keutzer: Refining switching window by time slots for crosstalk noise calculation. ICCAD 2002: 583-586

Kurt Keutzer, Sharad Malik, A. Richard Newton: From ASIC to ASIP: The Next Design Discontinuity. ICCD 2002: 84-90

Pinhong Chen, Yuji Kukimoto, Chin-Chi Teng, Kurt Keutzer: On convergence of switching windows computation in presence of crosstalk noise. ISPD 2002: 84-89

Kurt Keutzer, Michael Orshansky: From blind certainty to informed uncertainty. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 37-41

Farhana Sheikh, Andreas Kuehlmann, Kurt Keutzer: Minimum-power retiming for dual-supply CMOS circuits. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 43-49

Serdar Tasiran, Kurt Keutzer: Coverage Metrics for Functional Validation of Hardware Designs. IEEE Design & Test of Computers 18(4): 36-45 (2001)

Mukul R. Prasad, Philip Chong, Kurt Keutzer: Why is Combinational ATPG Efficiently Solvable for Practical VLSI Circuits? J. Electronic Testing 17(6): 509-527 (2001)

Farzan Fallah, Srinivas Devadas, Kurt Keutzer: Functional vector generation for HDL models using linearprogramming and Boolean satisfiability. IEEE Trans. on CAD of Integrated Circuits and Systems 20(8): 994-1002 (2001)

Farzan Fallah, Srinivas Devadas, Kurt Keutzer: OCCOM-efficient computation of observability-based code coveragemetrics for functional verification. IEEE Trans. on CAD of Integrated Circuits and Systems 20(8): 1003-1015 (2001)

Patrick Schaumont, Ingrid Verbauwhede, Kurt Keutzer, Majid Sarrafzadeh: A Quick Safari Through the Reconfiguration Jungle. DAC 2001: 172-177

David G. Chinnery, Borivoje Nikolic, Kurt Keutzer: Achieving 550Mhz in an ASIC Methodology. DAC 2001: 420-425

Marco Sgroi, Michael Sheets, Andrew Mihal, Kurt Keutzer, Sharad Malik, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli: Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design. DAC 2001: 667-672

Bret M. Victor, Kurt Keutzer: Bus Encoding to Prevent Crosstalk Delay. ICCAD 2001: 57-

Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer: A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage. ICCD 2001: 82-88

Pinhong Chen, Kurt Keutzer, Desmond Kirkpatrick: Scripting for EDA Tools: A Case Study. ISQED 2001: 87-

Dennis Sylvester, Kurt Keutzer: A global wiring paradigm for deep submicron design. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 242-252 (2000)

Kurt Keutzer, A. Richard Newton, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli: System-level design: orthogonalization of concerns andplatform-based design. IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1523-1543 (2000)

David G. Chinnery, Kurt Keutzer: Closing the gap between ASIC and custom: an ASIC perspective. DAC 2000: 637-642

Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu: Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits. ICCAD 2000: 62-67

Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer: Miller Factor for Gate-Level Coupling Delay Calculation. ICCAD 2000: 68-74

Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer: Switching Window Computation for Static Timing Analysis in Presence of Crosstalk Noise. ICCAD 2000: 331-337

Dennis Sylvester, Kurt Keutzer: Rethinking Deep-Submicron Circuit Design. IEEE Computer 32(11): 25-33 (1999)

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer: A text-compression-based method for code size minimization in embedded systems. ACM Trans. Design Autom. Electr. Syst. 4(1): 12-38 (1999)

Mukul R. Prasad, Philip Chong, Kurt Keutzer: Why is ATPG Easy? DAC 1999: 22-28

Raul Camposano, Kurt Keutzer, Jerry Fiddler, Alberto L. Sangiovanni-Vincentelli, Jim Lansford: HW and SW in Embedded System Design: Loveboat, Shipwreck, or Ships Passing in the Night. DAC 1999: 76-77

Kurt Keutzer, Kurt Wolf, David Pietromonaco, Jay Maxey, Jeff Lewis, Martin Lefebvre, Jeff Burns: Panel: Cell Libraries - Build vs. Buy; Static vs. Dynamic. DAC 1999: 341-342

Pinhong Chen, Kurt Keutzer: Towards true crosstalk noise analysis. ICCAD 1999: 132-138

Kurt Keutzer, A. Richard Newton: The MARCO/DARPA Gigascale Silicon Research Center. ICCD 1999: 14-

Dennis Sylvester, Kurt Keutzer: Getting to the bottom of deep submicron II: a global wiring paradigm. ISPD 1999: 193-200

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert Wang: Code Optimization Techniques in Embedded DSP Microprocessors. Design Autom. for Emb. Sys. 3(1): 59-73 (1998)

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer: Code density optimization for embedded DSP processors using data compression techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 17(7): 601-608 (1998)

Stan Y. Liao, Kurt Keutzer, Steven W. K. Tjiang, Srinivas Devadas: A new viewpoint on code generation for directed acyclic graphs. ACM Trans. Design Autom. Electr. Syst. 3(1): 51-75 (1998)

Farzan Fallah, Srinivas Devadas, Kurt Keutzer: OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification. DAC 1998: 152-157

Farzan Fallah, Srinivas Devadas, Kurt Keutzer: Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability. DAC 1998: 528-533

Dennis Sylvester, Kurt Keutzer: Getting to the bottom of deep submicron. ICCAD 1998: 203-211

Srinivas Devadas, Kurt Keutzer: An algorithmic approach to optimizing fault coverage for BIST logic synthesis. ITC 1998: 164-173

José C. Monteiro, Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer, Jacob K. White: Estimation of average switching activity in combinational logic circuits using symbolic simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 16(1): 121-127 (1997)

Kurt Keutzer: Challenges in CAD for the One Million Gate FPGA. FPGA 1997: 133-134

Kurt Keutzer, A. Richard Newton, Narendra V. Shenoy: The future of logic synthesis and physical design in deep-submicron process geometries. ISPD 1997: 218-224

Srinivas Devadas, Kurt Keutzer: Addendum to "Synthesis of robust delay-fault testable circuits: Theory". IEEE Trans. on CAD of Integrated Circuits and Systems 15(4): 445-446 (1996)

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert Wang: Storage Assignment to Decrease Code Size. ACM Trans. Program. Lang. Syst. 18(3): 235-253 (1996)

Kurt Keutzer: The Need for Formal Methods for Integrated Circuit Design. FMCAD 1996: 1-18

Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer: An observability-based code coverage metric for functional simulation. ICCAD 1996: 418-425

Kurt Keutzer, Olivier Coudert, Ramsey W. Haddad: What is the state of the art in commercial EDA tools for low power? ISLPED 1996: 181-187

Kurt Keutzer, Sharad Malik: Register Transfer Level Synthesis: From Theory to Practice. VLSI Design 1996: 2

Anantha Chandrakasan, Kurt Keutzer, A. Khandekar, S. L. Maskara, B. D. Pradhan, Mani B. Srivastava: Mobile Communications: Demands on VLSI Technology, Design and CAD. VLSI Design 1996: 432-436

Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli: Synthesis of hazard-free asynchronous circuits with bounded wire delays. IEEE Trans. on CAD of Integrated Circuits and Systems 14(1): 61-86 (1995)

Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli: Synthesis for testability techniques for asynchronous circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 14(12): 1569-1577 (1995)

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer: Code density optimization for embedded DSP processors using data compression techniques. ARVLSI 1995: 272-285

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert Wang: Code Optimization Techniques for Embedded DSP Microprocessors. DAC 1995: 599-604

Peter Vanbekbergen, Albert Wang, Kurt Keutzer: A Design and Validation System for Asynchronous Circuits. DAC 1995: 725-730

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang: Instruction selection using binate covering for code size optimization. ICCAD 1995: 393-399

Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert Wang: Storage Assignment to Decrease Code Size. PLDI 1995: 186-195

Massoud Pedram, Robert W. Brodersen, Kurt Keutzer (Eds.): Proceedings of the 1995 International Symposium on Low Power Design 1995, Dana Point, California, USA, April 23-26, 1995. ACM 1995, isbn 0-89791-744-8

Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Event suppression: improving the efficiency of timing simulation for synchronous digital circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 13(6): 814-822 (1994)

Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Certified timing verification and the transition delay of a logic circuit. IEEE Trans. VLSI Syst. 2(3): 333-342 (1994)

Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Verification of asynchronous interface circuits with bounded wire delays. VLSI Signal Processing 7(1-2): 161-182 (1994)

Kurt Keutzer: Hardware-Software Co-Design and ESDA. DAC 1994: 435-436

Guido Araujo, Srinivas Devadas, Kurt Keutzer, Stan Y. Liao, Sharad Malik, Ashok Sudarsanam, Steven W. K. Tjiang, Albert Wang: Challenges in code generation for embedded processors. Code Generation for Embedded Processors 1994: 48-64

Srinivas Devadas, Kurt Keutzer, Sharad Malik: A synthesis-based test generation and compaction algorithm for multifaults. J. Electronic Testing 4(1): 91-104 (1993)

Pranav Ashar, Srinivas Devadas, Kurt Keutzer: Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks. Formal Methods in System Design 2(1): 93-112 (1993)

Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer: Delay-fault test generation and synthesis for testability under a standard scan design methodology. IEEE Trans. on CAD of Integrated Circuits and Systems 12(8): 1217-1231 (1993)

Srinivas Devadas, Kurt Keutzer, Sharad Malik: Computation of floating mode delay in combinational circuits: theory and algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1913-1923 (1993)

Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Computation of floating mode delay in combinational circuits: practice and implementation. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1924-1936 (1993)

Horng-Fei Jyu, Sharad Malik, Srinivas Devadas, Kurt Keutzer: Statistical timing analysis of combinational logic circuits. IEEE Trans. VLSI Syst. 1(2): 126-137 (1993)

Kurt Keutzer: What is the Next Big Productivity Boost for Designers? (Panel Abstract). DAC 1993: 141

Srinivas Devadas, Kurt Keutzer: Synthesis of robust delay-fault-testable circuits: theory. IEEE Trans. on CAD of Integrated Circuits and Systems 11(1): 87-101 (1992)

Srinivas Devadas, Kurt Keutzer: Synthesis of robust delay-fault-testable circuits: practice. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 277-300 (1992)

Gary D. Hachtel, Reily M. Jacoby, Kurt Keutzer, Christopher R. Morrison: On properties of algebraic transformations and the synthesis of multifault-irredundant circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 313-321 (1992)

Srinivas Devadas, Kurt Keutzer, Jacob K. White: Estimation of power dissipation in CMOS combinational circuits using Boolean function manipulation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 373-383 (1992)

Michael J. Bryan, Srinivas Devadas, Kurt Keutzer: Necessary and sufficient conditions for hazard-free robust transistor stuck-open-fault testability in multilevel networks. IEEE Trans. on CAD of Integrated Circuits and Systems 11(6): 800-803 (1992)

Srinivas Devadas, Kurt Keutzer: Validatable nonrobust delay-fault testable circuits via logic synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 11(12): 1559-1573 (1992)

Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer, Jacob White: Estimation of Average Switching Activity in Combinational and Sequential Circuits. DAC 1992: 253-259

Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Certified Timing Verification and the Transition Delay of a Logic Circuit. DAC 1992: 549-555

Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Verification of asynchronous interface circuits with bounded wire delays. ICCAD 1992: 188-195

Amelia Shen, Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer: On average power dissipation and random pattern testability of CMOS combinational logic networks. ICCAD 1992: 402-407

Srinivas Devadas, Horng-Fei Jyu, Kurt Keutzer, Sharad Malik: Statistical Timing Analysis of Combinational Circuits. ICCD 1992: 38-43

Srinivas Devadas, Kurt Keutzer: A unified approach to the synthesis of fully testable sequential machines. IEEE Trans. on CAD of Integrated Circuits and Systems 10(1): 39-50 (1991)

Kurt Keutzer, Sharad Malik, Alexander Saldanha: Is redundancy necessary to reduce delay? IEEE Trans. on CAD of Integrated Circuits and Systems 10(4): 427-435 (1991)

Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer: Robust Delay-Fault Test Generation and Synthesis for Testability Under A Standard Scan Design Methodology. DAC 1991: 80-86

Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli: Algorithms for Synthesis of Hazard-Free Asynchronous Circuits. DAC 1991: 302-308

Srinivas Devadas, Kurt Keutzer, Sharad Malik: A Synthesis-Based Test Generation and Compaction Algorithm for Multifaults. DAC 1991: 359-365

Srinivas Devadas, Kurt Keutzer, Sharad Malik: Delay Computation in Combinational Logic Circuits: Theory and Algorithms. ICCAD 1991: 176-179

Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli: Synthesis for Testability Techniques for Asynchronous Circuits. ICCAD 1991: 326-329

Srinivas Devadas, Kurt Keutzer, A. S. Krishnakumar: Design Verfication and Reachability Analysis Using Algebraic Manipulation. ICCD 1991: 250-258

Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer: A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits. ITC 1991: 403-410

Pranav Ashar, Srinivas Devadas, Kurt Keutzer: Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks. ITC 1991: 887-896

Kurt Keutzer: The Need for Formal Verification in Hardware Design and What Formal Verification Has Not Done for Me Lately. TPHOLs 1991: 77-86

Srinivas Devadas, Kurt Keutzer: Synthesis and Optimization Procedures for Robustly Delay-Fault Testable Combinational Logic Circuits. DAC 1990: 221-227

Kurt Keutzer, Sharad Malik, Alexander Saldanha: Is Redundancy Necessary to Reduce Delay. DAC 1990: 228-234

Kurt Keutzer: Impact and Evaluation of Competing Implementation Media for ASIC's (Panel Abstract). DAC 1990: 600

Srinivas Devadas, Kurt Keutzer: An Automata-Theoretic Approach to Behavioral Equivalence. ICCAD 1990: 30-33

Michael J. Bryan, Srinivas Devadas, Kurt Keutzer: Testability-Preserving Circuit Transformations. ICCAD 1990: 456-459

Srinivas Devadas, Kurt Keutzer: Design of integrated circuits fully testable for delay-faults and multifaults. ITC 1990: 284-293

Wayne Wolf, Kurt Keutzer, Janaki Akella: Addendum to 'A kernel-finding state assignment algorithm for multi-level logic'. IEEE Trans. on CAD of Integrated Circuits and Systems 8(8): 925-927 (1989)

Kurt Keutzer: Three Competing Design Methodologies for ASIC's: Architectual Synthesis, Logic Synthesis, Logic Synthesis and Module Generation. DAC 1989: 308-313

Wayne Wolf, Kurt Keutzer, Janaki Akella: A Kernel-Finding State Assignment Algorithm for Multi-Level Logic. DAC 1988: 433-438

Kurt Keutzer, Wayne Wolf: Anatomy of a Hardware Compiler. PLDI 1988: 95-104

Kurt Keutzer: DAGON: Technology Binding and Local Optimization by DAG Matching. DAC 1987: 341-347