| 2003 | ||
|---|---|---|
| c3 | Seongwoon Kim, Ando Ki, Bogwan Kim: A RACE Protocol Implementation with IA Processors. PDPTA 2003: 1732-1736 | |
| 2002 | ||
| j3 | Seungjong Lee, Ando Ki, In-Cheol Park, Chong-Min Kyung: Interface synthesis between software chip model and target board. Journal of Systems Architecture 48(1-3): 49-57 (2002) | |
| 2000 | ||
| j2 | Ando Ki, Alan E. Knowles: Stride prefetching for the secondary data cache. Journal of Systems Architecture 46(12): 1093-1102 (2000) | |
| 1999 | ||
| j1 | Ando Ki: Secondary cache enhancement using a novel tagged prefetching method. Microprocessors and Microsystems - Embedded Hardware Design 23(4): 245-253 (1999) | |
| 1997 | ||
| c2 | Ando Ki, Alan E. Knowles: Adaptive Data Prefetching Using Cache Information. International Conference on Supercomputing 1997: 204-212 | |
| 1996 | ||
| c1 | Woo-Jong Hahn, Ando Ki, Kee-Wook Rim, Soo-Won Kim: Electronics and Telecommunications Research Institute: A Multiprocessor Server with a New Highly Pipelined Bus. IPPS 1996: 512-517 | |
| 1 | Woo-Jong Hahn | |
| 2 | Bogwan Kim | |
| 3 | Seongwoon Kim | |
| 4 | Soo-Won Kim | |
| 5 | Alan E. Knowles | |
| 6 | Chong-Min Kyung | |
| 7 | Seungjong Lee | |
| 8 | In-Cheol Park | |
| 9 | Kee-Wook Rim |
Colors in the list of coauthors
Last update Tue May 21 16:45:41 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page