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Changkyu Kim
2010 – today
- 2013
[i3]Changkyu Kim, Russell Ford, Yanjia Qi, Sundeep Rangan: Joint Interference and User Association Optimization in Cellular Wireless Networks. CoRR abs/1304.3977 (2013)- [i2]Russell Ford, Changkyu Kim, Sundeep Rangan: Opportunistic Third-Party Backhaul for Cellular Wireless Networks. CoRR abs/1305.0958 (2013)
- 2012
- [j13]Venkatraman Govindaraju, Chen-Han Ho, Tony Nowatzki, Jatin Chhugani, Nadathur Satish, Karthikeyan Sankaralingam, Changkyu Kim: DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing. IEEE Micro 32(5): 38-51 (2012)
- [c22]Jatin Chhugani, Nadathur Satish, Changkyu Kim, Jason Sewall, Pradeep Dubey: Fast and Efficient Graph Traversal Algorithm for CPUs: Maximizing Single-Node Efficiency. IPDPS 2012: 378-389
- [c21]Nadathur Satish, Changkyu Kim, Jatin Chhugani, Hideki Saito, Rakesh Krishnaiyer, Mikhail Smelyanskiy, Milind Girkar, Pradeep Dubey: Can traditional programming bridge the Ninja performance gap for parallel computing applications? ISCA 2012: 440-451
- [c20]Victor C. Valgenti, Jatin Chhugani, Yan Sun, Nadathur Satish, Min Sik Kim, Changkyu Kim, Pradeep Dubey: GPP-Grep: High-Speed Regular Expression Processing Engine on General Purpose Processors. RAID 2012: 334-353
- [c19]Jatin Chhugani, Changkyu Kim, Hemant Shukla, Jongsoo Park, Pradeep Dubey, John Shalf, Horst D. Simon: Billion-particle SIMD-friendly two-point correlation on large-scale HPC cluster systems. SC 2012: 1
- [c18]Nadathur Satish, Changkyu Kim, Jatin Chhugani, Pradeep Dubey: Large-scale energy-efficient graph traversal: a path to efficient data-intensive supercomputing. SC 2012: 14
- [c17]Changkyu Kim, Jongsoo Park, Nadathur Satish, Hongrae Lee, Pradeep Dubey, Jatin Chhugani: CloudRAMSort: fast and efficient large-scale distributed RAM sort on shared-nothing cluster. SIGMOD Conference 2012: 841-850
- 2011
- [j12]Jason Sewall, Jatin Chhugani, Changkyu Kim, Nadathur Satish, Pradeep Dubey: PALM: Parallel Architecture-Friendly Latch-Free Modifications to B+ Trees on Many-Core Processors. PVLDB 4(11): 795-806 (2011)
- [j11]Jens Krüger, Changkyu Kim, Martin Grund, Nadathur Satish, David Schwalb, Jatin Chhugani, Hasso Plattner, Pradeep Dubey, Alexander Zeier: Fast Updates on Read-Optimized Databases Using Multi-Core CPUs. PVLDB 5(1): 61-72 (2011)
- [j10]Changkyu Kim, Jatin Chhugani, Nadathur Satish, Eric Sedlar, Anthony D. Nguyen, Tim Kaldewey, Victor W. Lee, Scott A. Brandt, Pradeep Dubey: Designing fast architecture-sensitive tree search on modern multicore/many-core processors. ACM Trans. Database Syst. 36(4): 22 (2011)
- [c16]Guangyu Sun, Christopher J. Hughes, Changkyu Kim, Jishen Zhao, Cong Xu, Yuan Xie, Yen-Kuang Chen: Moguls: a model to explore the memory hierarchy for bandwidth improvements. ISCA 2011: 377-388
- [i1]Jens Krüger, Changkyu Kim, Martin Grund, Nadathur Satish, David Schwalb, Jatin Chhugani, Hasso Plattner, Pradeep Dubey, Alexander Zeier: Fast Updates on Read-Optimized Databases Using Multi-Core CPUs. CoRR abs/1109.6885 (2011)
- 2010
- [j9]Christopher J. Hughes, Changkyu Kim, Yen-Kuang Chen: Performance and Energy Implications of Many-Core Caches for Throughput Computing. IEEE Micro 30(6): 25-35 (2010)
- [c15]Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey: Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU. ISCA 2010: 451-460
- [c14]Anthony D. Nguyen, Nadathur Satish, Jatin Chhugani, Changkyu Kim, Pradeep Dubey: 3.5-D Blocking Optimization for Stencil Computations on Modern CPUs and GPUs. SC 2010: 1-13
- [c13]Changkyu Kim, Jatin Chhugani, Nadathur Satish, Eric Sedlar, Anthony D. Nguyen, Tim Kaldewey, Victor W. Lee, Scott A. Brandt, Pradeep Dubey: FAST: fast architecture sensitive tree search on modern CPUs and GPUs. SIGMOD Conference 2010: 339-350
- [c12]Nadathur Satish, Changkyu Kim, Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, Daehyun Kim, Pradeep Dubey: Fast sort on CPUs and GPUs: a case for bandwidth oblivious SIMD sort. SIGMOD Conference 2010: 351-362
2000 – 2009
- 2009
- [j8]Changkyu Kim, Eric Sedlar, Jatin Chhugani, Tim Kaldewey, Anthony D. Nguyen, Andrea Di Blas, Victor W. Lee, Nadathur Satish, Pradeep Dubey: Sort vs. Hash Revisited: Fast Join Implementation on Modern Multi-Core CPUs. PVLDB 2(2): 1378-1389 (2009)
- [c11]Yu Chen, Wenlong Li, Changkyu Kim, Zhizhong Tang: Efficient shared cache management through sharing-aware replacement and streaming-aware insertion policy. IPDPS 2009: 1-11
- [c10]Ming C. Lin, Stephen J. Guy, Rahul Narain, Jason Sewall, Sachin Patil, Jatin Chhugani, Abhinav Golas, Jur P. van den Berg, Sean Curtis, David Wilkie, Paul Merrell, Changkyu Kim, Nadathur Satish, Pradeep Dubey, Dinesh Manocha: Interactive Modeling, Simulation and Control of Large-Scale Crowds and Traffic. MIG 2009: 94-103
- [c9]Stephen J. Guy, Jatin Chhugani, Changkyu Kim, Nadathur Satish, Ming C. Lin, Dinesh Manocha, Pradeep Dubey: ClearPath: highly parallel collision avoidance for multi-agent simulation. Symposium on Computer Animation 2009: 177-187
- 2008
- [j7]Sanjeev Kumar, Jatin Chhugani, Changkyu Kim, Daehyun Kim, Anthony D. Nguyen, Pradeep Dubey, Christian Bienia, Youngmin Kim: Second Life and the New Generation of Virtual Worlds. IEEE Computer 41(9): 46-53 (2008)
- [j6]Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger: Multitasking workload scheduling on flexible core chip multiprocessors. SIGARCH Computer Architecture News 36(2): 46-55 (2008)
- [c8]Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger: Multitasking workload scheduling on flexible-core chip multiprocessors. PACT 2008: 187-196
- [c7]Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Changkyu Kim, Victor W. Lee, Anthony D. Nguyen: Atomic Vector Operations on Chip Multiprocessors. ISCA 2008: 441-452
- 2007
- [j5]Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro 27(5): 41-50 (2007)
- [j4]Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA Substrate for Flexible CMP Cache Sharing. IEEE Trans. Parallel Distrib. Syst. 18(8): 1028-1040 (2007)
- [c6]Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler: Composable Lightweight Processors. MICRO 2007: 381-394
- 2006
- [c5]Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger: Implementation and Evaluation of On-Chip Network Architectures. ICCD 2006
- [c4]Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO 2006: 480-491
- 2005
- [c3]Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA substrate for flexible CMP cache sharing. ICS 2005: 31-40
- 2004
- [j3]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore: TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. TACO 1(1): 62-93 (2004)
- 2003
- [j2]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. IEEE Micro 23(6): 46-51 (2003)
- [j1]Changkyu Kim, Doug Burger, Stephen W. Keckler: Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. IEEE Micro 23(6): 99-107 (2003)
- [c2]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. ISCA 2003: 422-433
- 2002
- [c1]Changkyu Kim, Doug Burger, Stephen W. Keckler: An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. ASPLOS 2002: 211-222
Coauthor Index
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last updated on 2013-06-03 20:13 CEST by the dblp team