| 2013 | ||
|---|---|---|
| j39 | Won-Young Lee, Jiehwan Oh, Lee-Sup Kim: A LOG-Induced SSN-Tolerant Transceiver for On-Chip Interconnects in COG-Packaged Source Driver IC for TFT-LCD. IEEE Trans. on Circuits and Systems 60-II(1): 21-25 (2013) | |
| j38 | Hong-Yun Kim, Young-Jun Kim, Jiehwan Oh, Lee-Sup Kim: A Reconfigurable SIMT Processor for Mobile Ray Tracing With Contention Reduction in Shared Memory. IEEE Trans. on Circuits and Systems 60-I(4): 938-950 (2013) | |
| j37 | Jun-Seok Park, Hyo-Eun Kim, Lee-Sup Kim: A 182 mW 94.3 f/s in Full HD Pattern-Matching Based Image Recognition Accelerator for an Embedded Vision System in 0.13-µm CMOS Technology. IEEE Trans. Circuits Syst. Video Techn. 23(5): 832-845 (2013) | |
| j36 | Jae-Sung Yoon, Jeong-Hyun Kim, Hyo-Eun Kim, Won-Young Lee, Seok-Hoon Kim, Kyusik Chung, Jun-Seok Park, Lee-Sup Kim: A Unified Graphics and Vision Processor With a 0.89 µW/fps Pose Estimation Engine for Augmented Reality. IEEE Trans. VLSI Syst. 21(2): 206-216 (2013) | |
| c47 | Seungwook Paek, Wongyu Shin, Jaeyoung Lee, Hyo-Eun Kim, Jun-Seok Park, Lee-Sup Kim: All-digital hybrid temperature sensor network for dense thermal monitoring. ISSCC 2013: 260-261 | |
| c46 | Ji-Hwan Seol, Young-Ju Kim, Sang-Hye Chung, Kyung-Soo Ha, Seung-Jun Bae, Jung-Bae Lee, Joo-Sun Choi, Lee-Sup Kim: An 8Gb/s 0.65mW/Gb/s forwarded-clock receiver using an ILO with dual feedback loop and quadrature injection scheme. ISSCC 2013: 410-411 | |
| 2012 | ||
| j35 | Hong-Yun Kim, Young-Jun Kim, Lee-Sup Kim: MRTP: Mobile Ray Tracing Processor With Reconfigurable Stream Multi-Processors for High Datapath Utilization. J. Solid-State Circuits 47(2): 518-535 (2012) | |
| j34 | Won-Young Lee, Lee-Sup Kim: A 5.4-Gb/s Clock and Data Recovery Circuit Using Seamless Loop Transition Scheme With Minimal Phase Noise Degradation. IEEE Trans. on Circuits and Systems 59-I(11): 2518-2528 (2012) | |
| j33 | Won-Young Lee, Kyu-Dong Hwang, Lee-Sup Kim: A 5.4/2.7/1.62-Gb/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme. IEEE Trans. on Circuits and Systems 59-I(12): 2858-2866 (2012) | |
| j32 | Hyo-Eun Kim, Jae-Sung Yoon, Kyu-Dong Hwang, Young-Jun Kim, Jun-Seok Park, Lee-Sup Kim: A Reconfigurable Heterogeneous Multimedia Processor for IC-Stacking on Si-Interposer. IEEE Trans. Circuits Syst. Video Techn. 22(4): 589-604 (2012) | |
| j31 | Won-Young Lee, Lee-Sup Kim: An Adaptive Equalizer With the Capacitance Multiplication for DisplayPort Main Link in 0.18-$\mu$m CMOS. IEEE Trans. VLSI Syst. 20(5): 964-968 (2012) | |
| j30 | Seok-Hoon Kim, Sung-Eui Yoon, Sang-Hye Chung, Young-Jun Kim, Hong-Yun Kim, Kyusik Chung, Lee-Sup Kim: A Mobile 3-D Display Processor With A Bandwidth-Saving Subdivider. IEEE Trans. VLSI Syst. 20(6): 1082-1093 (2012) | |
| j29 | Young-Jun Kim, Hyo-Eun Kim, Seok-Hoon Kim, Jun-Seok Park, Seungwook Paek, Lee-Sup Kim: Homogeneous Stream Processors With Embedded Special Function Units for High-Utilization Programmable Shaders. IEEE Trans. VLSI Syst. 20(9): 1691-1704 (2012) | |
| c45 | Hyo-Eun Kim, Jun-Seok Park, Jae-Sung Yoon, Seok-Hoon Kim, Lee-Sup Kim: A 1mJ/frame unified media application processor with a 179.7pJ mixed-mode feature extraction engine for embedded 3D-media contents processing. CICC 2012: 1-4 | |
| c44 | Seungwook Paek, Seok-Hwan Moon, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim: PowerField: a transient temperature-to-power technique based on Markov random field theory. DAC 2012: 630-635 | |
| c43 | Yong-Hun Kim, Lee-Sup Kim: A 20 Gbps 1-tap decision feedback equalizer with unfixed tap coefficient. ISCAS 2012: 321-324 | |
| 2011 | ||
| j28 | Won-Young Lee, Lee-Sup Kim: A Spread Spectrum Clock Generator for DisplayPort Main Link. IEEE Trans. on Circuits and Systems 58-II(6): 361-365 (2011) | |
| j27 | Mi-Jo Kim, Lee-Sup Kim: A 100 MHz-to-1 GHz Fast-Lock Synchronous Clock Generator With DCC for Mobile Applications. IEEE Trans. on Circuits and Systems 58-II(8): 477-481 (2011) | |
| j26 | Hong-Yun Kim, Chang-Hyo Yu, Lee-Sup Kim: A Memory-Efficient Unified Early Z-Test. IEEE Trans. Vis. Comput. Graph. 17(9): 1286-1294 (2011) | |
| j25 | Jae-Sung Yoon, Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim: A Dual-Shader 3-D Graphics Processor With Fast 4-D Vector Inner Product Units and Power-Aware Texture Cache. IEEE Trans. VLSI Syst. 19(4): 525-537 (2011) | |
| c42 | Young-Ju Kim, Sang-Hye Chung, Lee-Sup Kim: A 7.4 Gb/s forwarded clock receiver based on first-harmonic injection-locked oscillator using AC coupled clock multiplication unit in 0.13µm CMOS. CICC 2011: 1-4 | |
| c41 | Won-Young Lee, Lee-Sup Kim: A 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme without phase noise degradation. ISCAS 2011: 430-433 | |
| c40 | Seungwook Paek, Jiehwan Oh, Sang-Hye Chung, Lee-Sup Kim: Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors. ISCAS 2011: 1664-1667 | |
| c39 | Hyo-Eun Kim, Jae-Sung Yoon, Kyu-Dong Hwang, Young-Jun Kim, Jun-Seok Park, Lee-Sup Kim: A 275mW heterogeneous multimedia processor for IC-stacking on Si-interposer. ISSCC 2011: 128-130 | |
| 2010 | ||
| j24 | Kwang-Il Oh, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Joo-Sun Choi, Kinam Kim: Correction on "A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme" [Aug 09 2222-2232]. J. Solid-State Circuits 45(2): 497 (2010) | |
| j23 | Seok-Hoon Kim, Hong-Yun Kim, Young-Jun Kim, Kyusik Chung, Donghyun Kim, Lee-Sup Kim: A 116 fps/74 mW Heterogeneous 3D-Media Processor for 3-D Display Applications. J. Solid-State Circuits 45(3): 652-667 (2010) | |
| j22 | Hye-Yoon Joo, Lee-Sup Kim: A Data-Pattern-Tolerant Adaptive Equalizer Using the Spectrum Balancing Method. IEEE Trans. on Circuits and Systems 57-II(3): 228-232 (2010) | |
| c38 | ||
| c37 | Hong-Yun Kim, Young-Jun Kim, Lee-Sup Kim: Reconfigurable mobile stream processor for ray tracing. CICC 2010: 1-4 | |
| c36 | Sang-Hye Chung, Kyu-Dong Hwang, Won-Young Lee, Lee-Sup Kim: A high resolution metastability-independent two-step gated ring oscillator TDC with enhanced noise shaping. ISCAS 2010: 1300-1303 | |
| c35 | Kyu-Dong Hwang, Lee-Sup Kim: An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages. ISCAS 2010: 3973-3976 | |
| c34 | Jae-Sung Yoon, Jeong-Hyun Kim, Hyo-Eun Kim, Won-Young Lee, Seok-Hoon Kim, Kyusik Chung, Jun-Seok Park, Lee-Sup Kim: A graphics and vision unified processor with 0.89µW/fps pose estimation engine for augmented reality. ISSCC 2010: 336-337 | |
| 2009 | ||
| j21 | Kyusik Chung, Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim: Shader-based tessellation to save memory bandwidth in a mobile multimedia processor. Computers & Graphics 33(5): 625-637 (2009) | |
| j20 | Donghyun Kim, Lee-Sup Kim: A Floating-Point Unit for 4D Vector Inner Product with Reduced Latency. IEEE Trans. Computers 58(7): 890-901 (2009) | |
| j19 | Chang-Hyo Yu, Kyusik Chung, Donghyun Kim, Seok-Hoon Kim, Lee-Sup Kim: A 186-Mvertices/s 161-mW Floating-Point Vertex Processor With Optimized Datapath and Vertex Caches. IEEE Trans. VLSI Syst. 17(10): 1369-1382 (2009) | |
| c33 | Won-Young Lee, Lee-Sup Kim: A Spread Spectrum Clock Generator with Spread Ratio Error Reduction Scheme for DisplayPort Main Link. ISCAS 2009: 185-188 | |
| c32 | Young-Jun Kim, Kyusik Chung, Lee-Sup Kim, Seong Mo Park: Bank-partition and Multi-fetch Scheme for Floating-point Special Function units in Multi-core Systems. ISCAS 2009: 1803-1806 | |
| c31 | Kyung-Soo Ha, Lee-Sup Kim, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim: A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces. ISSCC 2009: 138-139 | |
| 2008 | ||
| j18 | Donghyun Kim, Lee-Sup Kim: Area-efficient pixel rasterization and texture coordinate interpolation. Computers & Graphics 32(6): 669-681 (2008) | |
| j17 | Jong-Sun Kim, Lee-Sup Kim: Noise Robust Motion Refinement for Motion Compensated Noise Reduction. IEICE Transactions 91-D(5): 1581-1583 (2008) | |
| j16 | Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim: An Area Efficient Early Z -Test Method for 3-D Graphics Rendering Hardware. IEEE Trans. on Circuits and Systems 55-I(7): 1929-1938 (2008) | |
| c30 | Hyun-Kyu Jeon, Hye-Ran Kim, Jung-Min Choi, Ju-Pyo Hong, Yong-Suk Kim, Hyung-Seog Oh, Dae-Keun Han, Lee-Sup Kim: High speed serial interface for mobile LCD driver IC. ISCAS 2008: 157-160 | |
| c29 | Jeong-Hyun Kim, Kyusik Chung, Young-Jun Kim, Seok-Hoon Kim, Lee-Sup Kim: Clipping-ratio-independent 3D graphics clipping engine by dual-thread algorithm. ISCAS 2008: 3534-3537 | |
| 2007 | ||
| j15 | Jong-Sun Kim, Lee-Sup Kim: Binary Motion Estimation with Hybrid Distortion Measure. IEICE Transactions 90-D(9): 1474-1477 (2007) | |
| c28 | Jae-Sung Yoon, Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim: Triangle-Level Depth Filter Method for Bandwidth Reduction in 3D Graphics Hardware. ISCAS 2007: 765-768 | |
| 2006 | ||
| j14 | Hyunchul Shin, Jin-Aeon Lee, Lee-Sup Kim: A cost-effective VLSI architecture for anisotropic texture filtering in limited memory bandwidth. IEEE Trans. VLSI Syst. 14(3): 254-267 (2006) | |
| j13 | Byung-Do Yang, Lee-Sup Kim: A low-power ROM using single charge-sharing capacitor and hierarchical bit line. IEEE Trans. VLSI Syst. 14(4): 313-322 (2006) | |
| c27 | Seunghyun Cho, Chang-Hyo Yu, Lee-Sup Kim: An efficient texture cache for programmable vertex shaders. ISCAS 2006 | |
| c26 | Kyusik Chung, Chang-Hyo Yu, Lee-Sup Kim: Vertex cache of programmable geometry processor for mobile multimedia application. ISCAS 2006 | |
| c25 | ||
| c24 | Ju-Pyo Hong, Kyung-Soo Ha, Lee-Sup Kim: A 0.18µm CMOS 10Gb/s 1: 4 DEMUX using replica-bias circuits for optical receiver. ISCAS 2006 | |
| c23 | Kwang-Il Oh, Seunghyun Cho, Lee-Sup Kim: A low power SoC bus with low-leakage and low-swing technique. ISCAS 2006 | |
| 2005 | ||
| j12 | Chang-Young Han, Yeon-Ho Im, Lee-Sup Kim: Geometry engine architecture with early backface culling hardware. Computers & Graphics 29(3): 415-425 (2005) | |
| j11 | Joung-Youn Kim, Lee-Sup Kim: An Efficient Memory Address Converter for Soc-based 3d Graphics System. Journal of Circuits, Systems, and Computers 14(4): 861-876 (2005) | |
| j10 | Yeon-Ho Im, Chang-Young Han, Lee-Sup Kim: A Method to Generate Soft Shadows Using a Layered Depth Image and Warping. IEEE Trans. Vis. Comput. Graph. 11(3): 265-272 (2005) | |
| c22 | Kyusik Chung, Donghyun Kim, Lee-Sup Kim: A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware. ISCAS (5) 2005: 4546-4549 | |
| c21 | Jaewan Bae, Donghyun Kim, Lee-Sup Kim: An 11M-triangles/sec 3D graphics clipping engine for triangle primitives. ISCAS (5) 2005: 4570-4573 | |
| c20 | Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim: A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems. ISCAS (5) 2005: 4574-4577 | |
| 2004 | ||
| j9 | Donghyun Kim, Lee-Sup Kim: An Efficient Fragment Processing Technique in A-Buffer Implementation. IEICE Transactions 87-A(1): 258-269 (2004) | |
| c19 | ||
| c18 | ||
| c17 | Donghyun Kim, Lee-Sup Kim: Division-free rasterizer for perspective-correct texture filtering. ISCAS (2) 2004: 153-156 | |
| c16 | Byung-Do Yang, Lee-Sup Kim: An error pattern ROM compression method for continuous data. ISCAS (2) 2004: 845-848 | |
| c15 | Kwang-Il Oh, Lee-Sup Kim: A high performance low power dynamic PLA with conditional evaluation scheme. ISCAS (2) 2004: 881-884 | |
| 2003 | ||
| j8 | Chun-Ho Kim, Si-Mun Seong, Jin-Aeon Lee, Lee-Sup Kim: Winscale: an image-scaling algorithm using an area pixel model. IEEE Trans. Circuits Syst. Video Techn. 13(6): 549-553 (2003) | |
| j7 | Byung-Do Yang, Lee-Sup Kim: A low-power charge-recycling ROM architecture. IEEE Trans. VLSI Syst. 11(4): 590-600 (2003) | |
| c14 | Byung-Do Yang, Lee-Sup Kim: A low power charge sharing ROM using dummy bit lines. ISCAS (5) 2003: 377-380 | |
| c13 | Inho Lee, Joung-Youn Kim, Yeon-Ho Im, Yunseok Choi, Hyunchul Shin, Chang-Young Han, Donghyun Kim, Hyoungjoon Park, Young-Il Seo, Kyusik Chung, Chang-Hyo Yu, Kanghyup Chun, Lee-Sup Kim: A hardware-like high-level language based environment for 3D graphics architecture exploration. ISCAS (2) 2003: 512-515 | |
| c12 | Chang-Hyo Yu, Lee-Sup Kim: A hierarchical depth buffer for minimizing memory bandwidth in 3D rendering engine: Depth Filter. ISCAS (2) 2003: 724-727 | |
| c11 | Kyusik Chung, Lee-Sup Kim: A PN triangle generation unit for fast and simple tessellation hardware. ISCAS (2) 2003: 728-731 | |
| c10 | Kwang-Il Oh, Lee-Sup Kim: A clock delayed sleep mode domino logic for wide dynamic OR gate. ISLPED 2003: 176-179 | |
| 2002 | ||
| c9 | Byung-Do Yang, Lee-Sup Kim, Hyun-Kyu Yu: A high speed direct digital frequency synthesizer using a low power pipelined parallel accumulator. ISCAS (5) 2002: 373-376 | |
| c8 | Youngjoon Kim, Ki-Hyuk Sung, Lee-Sup Kim: A 1.67 GHz 32-bit pipelined carry-select adder using the complementary scheme. ISCAS (1) 2002: 461-464 | |
| 2001 | ||
| j6 | Joung-Youn Kim, Lee-Sup Kim, Seung-Ho Hwang: An advanced contrast enhancement using partially overlapped sub-block histogram equalization. IEEE Trans. Circuits Syst. Video Techn. 11(4): 475-484 (2001) | |
| j5 | Hyunchul Shin, Jin-Aeon Lee, Lee-Sup Kim: A hardware cost minimized fast Phong shader. IEEE Trans. VLSI Syst. 9(2): 297-304 (2001) | |
| c7 | Hyeon-Cheol Mo, Jong-Sun Kim, Lee-Sup Kim: A high-speed pattern decoder in MPEG-4 padding block hardware accelerator. ISCAS (2) 2001: 197-200 | |
| c6 | Youngjoon Kim, Lee-Sup Kim: A low power carry select adder with reduced area. ISCAS (4) 2001: 218-221 | |
| c5 | Sunho Chang, Lee-Sup Kim: Design trade-off in merged DRAM logic for video signal processing. ISCAS (5) 2001: 267-270 | |
| c4 | ||
| 2000 | ||
| j4 | Jin-Aeon Lee, Lee-Sup Kim: SPARP: a single pass antialiased rasterization processor. Computers & Graphics 24(2): 233-243 (2000) | |
| j3 | Seung-Kwon Paek, Lee-Sup Kim: A real-time wavelet vector quantization algorithm and its VLSI architecture. IEEE Trans. Circuits Syst. Video Techn. 10(3): 475-489 (2000) | |
| j2 | Sunho Chang, Bum-Sik Kim, Lee-Sup Kim: A programmable 3.2-GOPS merged DRAM logic for video signal processing. IEEE Trans. Circuits Syst. Video Techn. 10(6): 967-973 (2000) | |
| c3 | Sunho Chang, Jong-Sun Kim, Lee-Sup Kim: A Memory Architecture with 4-Address Configurations for Video Signal Processing. DATE 2000: 746 | |
| 1998 | ||
| c2 | Hyunchul Shin, Jin-Aeon Lee, Lee-Sup Kim: A minimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics. ICCD 1998: 286-291 | |
| 1997 | ||
| c1 | Bum-Sik Kim, Dae-Hyum Chung, Lee-Sup Kim: A new 4-2 adder and booth selector for low power MAC unit. ISLPED 1997: 100-103 | |
| 1989 | ||
| j1 | Lee-Sup Kim, Robert W. Dutton: Modeling of the distributed gate RC effect in MOSFET's. IEEE Trans. on CAD of Integrated Circuits and Systems 8(12): 1365-1367 (1989) | |
Colors in the list of coauthors
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