| 1990 | ||
|---|---|---|
| c5 | ||
| 1989 | ||
| c4 | B. Lokanathan, Edwin Kinnen: Performance optimized floor planning by graph planarization. DAC 1989: 116-121 | |
| 1987 | ||
| j2 | Maciej J. Ciesielski, Edwin Kinnen: Digraph Relaxation for 2-Dimensional Placement of IC Blocks. IEEE Trans. on CAD of Integrated Circuits and Systems 6(1): 55-66 (1987) | |
| 1985 | ||
| j1 | Krzysztof Kozminski, Edwin Kinnen: Rectangular duals of planar graphs. Networks 15(2): 145-157 (1985) | |
| 1984 | ||
| c3 | Krzysztof Kozminski, Edwin Kinnen: An algorithm for finding a rectangular dual of a planar graph for use in area planning for VLSI integrated circuits. DAC 1984: 655-656 | |
| 1982 | ||
| c2 | Maciej J. Ciesielski, Edwin Kinnen: An analytical method for compacting routing area in integrated circuits. DAC 1982: 30-37 | |
| 1981 | ||
| c1 | Maciej J. Ciesielski, Edwin Kinnen: An optimum layer assignment for routing in ICs and PCBs. DAC 1981: 733-737 | |
| 1 | Maciej J. Ciesielski | |
| 2 | Evagelos Katsadas | |
| 3 | Krzysztof Kozminski | |
| 4 | B. Lokanathan |
Data released under the ODC-BY 1.0 license — See also our legal information page