Dirk Koch

Dirk Koch: Partial Reconfiguration on FPGAs - Architectures, Tools and Applications. Lecture Notes in Electrical Engineering 153, Springer 2013, isbn 978-1-4614-1224-3, pp. 1-252

Christian Beckhoff, Dirk Koch, Jim Torresen: Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAhead. ARCS 2013: 303-316

Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jürgen Teich: Dynamic Defragmentation of Reconfigurable Devices. TRETS 5(2): 8 (2012)

Dirk Koch, Jim Torresen, Christian Beckhoff, Daniel Ziener, Christopher Dennl, Volker Breuer, Jürgen Teich, Michael Feilen, Walter Stechele: Partial Reconfiguration on FPGAs in Practice - Tools and Applications. ARCS Workshops 2012: 297-319

Alexander Wold, Dirk Koch, Jim Tørresen: Design techniques for increasing performance and resource utilization of reconfigurable soft CPUs. DDECS 2012: 50-55

Christian Beckhoff, Dirk Koch, Jim Torresen: Go Ahead: A Partial Reconfiguration Framework. FCCM 2012: 37-44

Dirk Koch, Satnam Singh, Jim Tørresen (Eds.): 22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012. IEEE 2012, isbn 978-1-4673-2257-7

Dirk Koch, Jim Torresen: FPGASort: a high performance sorting architecture exploiting run-time reconfiguration on fpgas for large problem sorting. FPGA 2011: 45-54

Dirk Koch, Jim Torresen: A Routing Architecture for Mapping Dataflow Graphs at Run-Time. FPL 2011: 286-290

Simen Gimle Hansen, Dirk Koch, Jim Torresen: High Speed Partial Run-Time Reconfiguration Using Enhanced ICAP Hard Macro. IPDPS Workshops 2011: 174-180

Christian Beckhoff, Dirk Koch, Jim Torresen: Migrating Static Systems to Partially Reconfigurable Systems on Spartan-6 FPGAs. IPDPS Workshops 2011: 212-219

Alexander Wold, Dirk Koch, Jim Torresen: Enhancing Resource Utilization with Design Alternatives in Runtime Reconfigurable Systems. IPDPS Workshops 2011: 264-270

Christian Beckhoff, Dirk Koch, Jim Tørresen: The Xilinx Design Language (XDL): Tutorial and use cases. ReCoSoC 2011: 1-8

Ali Ahmadinia, Josef Angermeier, Sándor P. Fekete, Tom Kamphans, Dirk Koch, Mateusz Majer, Nils Schweer, Jürgen Teich, Christopher Tessars, Jan van der Veen: ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices. Dynamically Reconfigurable Systems 2010: 199-221

Christian Haubelt, Dirk Koch, Felix Reimann, Thilo Streichert, Jürgen Teich: ReCoNets - Design Methodology for Embedded Systems Consisting of Small Networks of Reconfigurable Nodes and Connections. Dynamically Reconfigurable Systems 2010: 223-243

Dirk Koch, Christian Beckhoff, Jim Tørresen: Fine-Grained Partial Runtime Reconfiguration on Virtex-5 FPGAs. FCCM 2010: 69-72

Andreas Oetken, Stefan Wildermann, Jürgen Teich, Dirk Koch: A Bus-Based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs. FPL 2010: 234-239

Christian Beckhoff, Dirk Koch, Jim Torresen: Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration. FPL 2010: 596-601

Dirk Koch, Christian Beckhoff, Jim Torresen: Obstacle-free two-dimensional online-routing for run-time reconfigurable FPGA-based systems. FPT 2010: 208-215

Dirk Koch, Christian Beckhoff, Jim Tørresen: Advanced partial run-time reconfiguration on Spartan-6 FPGAs. FPT 2010: 361-364

Dirk Koch, Jim Tørresen: Routing optimizations for component-based system design and partial run-time reconfiguration on FPGAs. FPT 2010: 460-464

Dirk Koch, Christian Beckhoff, Jim Torresen: Zero logic overhead integration of partially reconfigurable modules. SBCCI 2010: 103-108

Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jürgen Teich: No-Break Dynamic Defragmentation of Reconfigurable. CoRR abs/1012.5330 (2010)

Dirk Koch: Architectures, methods, and tools for distributed run-time reconfigurable FPGA-based systems. University of Erlangen-Nuremberg 2009, pp. 1-289

Dirk Koch, Christian Beckhoff, Jürgen Teich: Hardware Decompression Techniques for FPGA-Based Embedded Systems. TRETS 2(2) (2009)

Dirk Koch, Christian Beckhoff, Jürgen Teich: Minimizing Internal Fragmentation by Fine-Grained Two-Dimensional Module Placement for Runtime Reconfiguralble Systems. FCCM 2009: 251-254

Dirk Koch, Christian Beckhoff, Jürgen Teich: A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs. FPGA 2009: 253-256

Martin Rump, Gero Müller, Ralf Sarlette, Dirk Koch, Reinhard Klein: Photo-realistic Rendering of Metallic Car Paint from Image-Based Measurements. Comput. Graph. Forum 27(2): 527-536 (2008)

Robert Brendle, Thilo Streichert, Dirk Koch, Christian Haubelt, Jürgen Teich: Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks. ARCS 2008: 117-129

Dirk Koch, Christian Haubelt, Jürgen Teich: Efficient Reconfigurable On-Chip Buses for FPGAs. FCCM 2008: 287-290

Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jürgen Teich: No-break dynamic defragmentation of reconfigurable devices. FPL 2008: 113-118

Dirk Koch, Christian Beckhoff, Jürgen Teich: ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS. FPL 2008: 119-124

Dirk Koch, Christian Haubelt, Jürgen Teich: Efficient hardware checkpointing: concepts, overhead analysis, and implementation. FPGA 2007: 188-196

Dirk Koch, Christian Beckhoff, Jürgen Teich: Bitstream Decompression for High Speed FPGA Configuration from Slow Memories. FPT 2007: 161-168

Dirk Koch, Christian Haubelt, Thilo Streichert, Jürgen Teich: Modeling and Synthesis of Hardware-Software Morphing. ISCAS 2007: 2746-2749

Thilo Streichert, Dirk Koch, Christian Haubelt, Jürgen Teich: Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems. EURASIP J. Emb. Sys. 2006 (2006)

Dirk Koch, Thilo Streichert, Steffen Dittrich, Christian Strengert, Christian Haubelt, Jürgen Teich: An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks. ARCS 2006: 202-216

Dmitrij Kissler, Alexey Kupriyanov, Frank Hannig, Dirk Koch, Jürgen Teich: A Generic Framework for Rapid Prototyping of System-on-Chip Designs. CDES 2006: 189-195

Dirk Koch, Matthiaas Koerber, Jürgen Teich: Searching RC5-Keys with Distributed Reconfigurable Computing. ERSA 2006: 42-48

Dirk Koch, Jürgen Teich: Platform-independent methodology for partial reconfiguration. Conf. Computing Frontiers 2004: 398-403

Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jürgen Teich: A Dynamic NoC Approach for Communication in Reconfigurable Devices. FPL 2004: 1032-1036

Dirk Koch: Preemptive Hardware Task Management. FPL 2004: 1174

Dirk Koch, Ali Ahmadinia, Christophe Bobda, Heiko Kalte: FPGA architecture extensions for preemptive multitasking and hardware defragmentation. FPT 2004: 433-436

Christian Haubelt, Dirk Koch, Jürgen Teich: Basic OS Support for Distributed Reconfigurable Hardware. SAMOS 2004: 30-38

Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich: Task scheduling for heterogeneous reconfigurable computers. SBCCI 2004: 22-27

Christian Haubelt, Dirk Koch, Jürgen Teich: ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware. SBCCI 2003: 343-348