Peter M. Kogge

Sheng Li, Shannon K. Kuntz, Jay B. Brockman, Peter M. Kogge: Lightweight Chip Multi-Threading (LCMT): Maximizing Fine-Grained Parallelism On-Chip. IEEE Trans. Parallel Distrib. Syst. 22(7): 1178-1191 (2011)

Megan Cason, Peter M. Kogge: Recomposing an Irregular Algorithm Using a Novel Low-Level PGAS Model. ICPP Workshops 2011: 238-248

Peter M. Kogge, Timothy J. Dysart: Using the TOP500 to trace and project technology and architecture trends. SC 2011: 28

Patrick Anthony La Fratta, Peter M. Kogge: Models for generating locality-tuned traveling threads for a hierarchical multi-level heterogeneous multicore. Conf. Computing Frontiers 2010: 227-236

Patrick Anthony La Fratta, Peter M. Kogge: Modeling bounds on migration overhead for a traveling thread architecture. IPDPS Workshops 2010: 1-8

Peter M. Kogge: The Challenges of Petascale Architectures. Computing in Science and Engineering 11(5): 10-16 (2009)

Timothy J. Dysart, Peter M. Kogge: Organizing wires for reliability in magnetic QCA. JETC 5(4) (2009)

Timothy J. Dysart, Peter M. Kogge: Analyzing the Inherent Reliability of Moderately Sized Magnetic and Electrostatic QCA Circuits Via Probabilistic Transfer Matrices. IEEE Trans. VLSI Syst. 17(4): 507-516 (2009)

Jay B. Brockman, Sheng Li, Peter M. Kogge, Amit Kashyap, Mohammad M. Mojarradi: Design of a mask-programmable memory/multiplier array using G4-FET technology. DAC 2008: 337-338

Timothy J. Dysart, Peter M. Kogge: System Reliabilities When Using Triple Modular Redundancy in Quantum-Dot Cellular Automata. DFT 2008: 72-80

Sheng Li, Shannon K. Kuntz, Peter M. Kogge, Jay B. Brockman: Memory model effects on application performance for a lightweight multithreaded architecture. IPDPS 2008: 1-8

Richard C. Murphy, Peter M. Kogge: On the Memory Access Patterns of Supercomputer Applications: Benchmark Selection and Its Implications. IEEE Trans. Computers 56(7): 937-945 (2007)

Sarah E. Murphy, Erik DeBenedictis, Peter M. Kogge: General floorplan for reversible quantum-dot cellular automata. Conf. Computing Frontiers 2007: 77-82

Timothy J. Dysart, Peter M. Kogge: Probabilistic Analysis of a Molecular Quantum-Dot Cellular Automata Adder. DFT 2007: 478-486

Sheng Li, Amit Kashyap, Shannon K. Kuntz, Jay B. Brockman, Peter M. Kogge, Paul L. Springer, Gary Block: A Heterogeneous Lightweight Multithreaded Architecture. IPDPS 2007: 1-8

Srinivas Sridharan, Arun Rodrigues, Peter M. Kogge: Evaluating synchronization techniques for light-weight multithreaded/multicore architectures. SPAA 2007: 57-58

Arun Rodrigues, Kyle B. Wheeler, Peter M. Kogge, Keith D. Underwood: Fine-Grained Message Pipelining for Improved MPI Performance. CLUSTER 2006

James F. Kramer, Matthias Scheutz, Jay B. Brockman, Peter M. Kogge: Facing up to the Inevitable: Intelligent Error Recovery in Massively Parallel Processing in Memory Architectures. PDPTA 2006: 227-233

Thomas L. Sterling, Peter M. Kogge, William J. Dally, Steve Scott, William Gropp, David E. Keyes, Peter H. Beckman: Multi-core issues - Multi-Core for HPC: breakthrough or breakdown? SC 2006: 73

Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Keith D. Underwood: Poster reception - The structural simulation toolkit: exploring novel architectures. SC 2006: 157

Erik DeBenedictis, David E. Keyes, Peter M. Kogge: M06 - Issues for the future of supercomputing: impact of Moore's law and architecture on application performance. SC 2006: 220

Danny Z. Chen, Ovidiu Daescu, John Hershberger, Peter M. Kogge, Ningfang Mi, Jack Snoeyink: Polygonal path simplification with angle constraints. Comput. Geom. 32(3): 173-187 (2005)

Craig S. Lent, Sarah E. Frost, Peter M. Kogge: Reversible computation with quantum-dot cellular automata (QCA). Conf. Computing Frontiers 2005: 403

Richard C. Murphy, Arun Rodrigues, Peter M. Kogge, Keith D. Underwood: The implications of working set analysis on supercomputing memory hierarchy design. ICS 2005: 332-340

Alexei Kudriavtsev, Peter M. Kogge: Generation of permutations for SIMD processors. LCTES 2005: 147-156

Dominic A. Antonelli, Danny Z. Chen, Timothy J. Dysart, Xiaobo Sharon Hu, Andrew B. Kahng, Peter M. Kogge, Richard C. Murphy, Michael T. Niemier: Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions. DAC 2004: 363-368

Michael T. Niemier, Ramprasad Ravichandran, Peter M. Kogge: Using Circuits and Systems-Level Research to Drive Nanotechnology. ICCD 2004: 302-309

Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Keith D. Underwood: Characterizing a new class of threads in scientific applications for high end supercomputers. ICS 2004: 164-174

Timothy J. Dysart, Branden J. Moore, Lambert Schaelicke, Peter M. Kogge: Cache implications of aggressively pipelined high performance microprocessors. ISPASS 2004: 123-132

Michael T. Niemier, Peter M. Kogge: The "4-Diamond Circuit" - A Minimally Complex Nano-Scale Computational Building Block in QCA. ISVLSI 2004: 3-10

Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. Kuntz, Peter M. Kogge: A low cost, multithreaded processing-in-memory system. WMPI 2004: 16-22

Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose, Peter M. Kogge: Energy-efficient issue queue design. IEEE Trans. VLSI Syst. 11(5): 789-800 (2003)

Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Jay B. Brockman, Ron Brightwell, Keith D. Underwood: Implications of a PIM Architectural Model for MPI. CLUSTER 2003: 259-

Peter M. Kogge: The State of State. HPCA 2003: 266

Sarah E. Frost, Arun Rodrigues, Charles A. Giefer, Peter M. Kogge: Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory. ISVLSI 2003: 19-28

Gary H. Bernstein, Jay B. Brockman, Peter M. Kogge, Gregory L. Snider, Barbara E. Walvoord: From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education. MSE 2003: 95-97

Kanad Ghose, Patrick H. Madden, Vivek De, Peter M. Kogge (Eds.): Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002. ACM 2002, isbn 1-58113-462-2

Victor V. Zyuban, Peter M. Kogge: Inherently Lower-Power High-Performance Superscalar Architectures. IEEE Trans. Computers 50(3): 268-285 (2001)

Lilia Yerosheva, Shannon K. Kuntz, Peter M. Kogge, Jay B. Brockman: A Microserver View of HTMT. IPDPS 2001: 3

Michael T. Niemier, Peter M. Kogge: Exploring and exploiting wire-level pipelining in emerging technologies. ISCA 2001: 166-177

Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge: Energy: efficient instruction dispatch buffer design for superscalar processors. ISLPED 2001: 237-242

Shannon K. Kuntz, Richard C. Murphy, Michael T. Niemier, Jesús A. Izaguirre, Peter M. Kogge: Petaflop Computing for Protein Folding. PPSC 2001

Danny Z. Chen, Ovidiu Daescu, John Hershberger, Peter M. Kogge, Jack Snoeyink: Polygonal path approximation with angle constraints. SODA 2001: 342-343

Michael T. Niemier, Michael J. Kontz, Peter M. Kogge: A design of and design tools for a novel quantum dot based microprocessor. DAC 2000: 227-232

Richard C. Murphy, Peter M. Kogge, Arun Rodrigues: The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems. Intelligent Memory Systems 2000: 85-103

Victor V. Zyuban, Peter M. Kogge: Optimization of high-performance superscalar architectures for energy efficiency. ISLPED 2000: 84-89

Kanad Ghose, Kiran Raghavendra Desai, Peter M. Kogge: Accelerating object-oriented applications using method lookup caches and register windowing. Journal of Systems Architecture 45(12-13): 1023-1046 (1999)

Victor V. Zyuban, Peter M. Kogge: Application of STD to latch-power estimation. IEEE Trans. VLSI Syst. 7(1): 111-115 (1999)

Lilia Yerosheva, Peter M. Kogge: Prototyping Execution Models for HTMT Petaflop Machine in Java. CANPC 1999: 32-46

Michael T. Niemier, Peter M. Kogge: Logic in Wire: Using Quantum Dots to Implement a Microprocessor. Great Lakes Symposium on VLSI 1999: 118-121

Jay B. Brockman, Peter M. Kogge, Thomas L. Sterling, Vincent W. Freeh, Shannon K. Kuntz: Microservers: a new memory semantics for massively parallel computing. International Conference on Supercomputing 1999: 454-463

Mary W. Hall, Peter M. Kogge, Jefferey G. Koller, Pedro C. Diniz, Jacqueline Chame, Jeff Draper, Jeff LaCoss, John J. Granacki, Jay B. Brockman, Apoorv Srivastava, William C. Athas, Vincent W. Freeh, Jaewook Shin, Joonseok Park: Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture. SC 1999: 57

Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapornchai, Peter M. Kogge: Optimizing Data Scheduling on Processor-in-Memory Arrays. IPPS/SPDP 1998: 57-61

Victor V. Zyuban, Peter M. Kogge: The energy complexity of register files. ISLPED 1998: 305-310

Kanad Ghose, Kiran Raghavendra Desai, Peter M. Kogge: Using Method Lookup Caches and Register Windowing to Speed Up Dynamically-Bound Object-Oriented Applications. EUROMICRO 1996: 441-

Peter M. Kogge, Toshio Sunaga, Hisatada Miyataka, Koji Kitamura, Eric Retter: Combined DRAM and logic chip for massively parallel systems. ARVLSI 1995: 4-16

Peter M. Kogge: Preface. IBM Journal of Research and Development 38(2): 115-116 (1994)

Peter M. Kogge: EXECUBE - A New Architecture for Scalable MPPs. ICPP (1) 1994: 77-84

Peter M. Kogge: Declarative Computing: A Technology Driver. ARCS 1992: 1-17

Peter M. Kogge: Function-based computing and parallelism: A review. Parallel Computing 2(3): 243-253 (1985)

Peter M. Kogge: Am Architectural Trail to Threaded-Code Systems. IEEE Computer 15(3): 22-32 (1982)

Peter M. Kogge: The Microprogramming of Pipelined Processors. ISCA 1977: 63-70

Peter M. Kogge: Parallel Solution of Recurrence Problems. IBM Journal of Research and Development 18(2): 138-148 (1974)

Peter M. Kogge: Maximal Rate Pipelined Solutions to Recurrance Problems. ISCA 1973: 71-76