| 2012 | ||
|---|---|---|
| j15 | Hiroshi Inoue, Takao Moriyama, Hideaki Komatsu, Toshio Nakatani: A high-performance sorting algorithm for multicore single-instruction multiple-data processors. Softw., Pract. Exper. 42(6): 753-777 (2012) | |
| c45 | Kumiko Maeda, Masana Murase, Munehiro Doi, Hideaki Komatsu, Shigeho Noda, Ryutaro Himeno: Automatic Resource Scheduling with Latency Hiding for Parallel Stencil Applications on GPGPU Clusters. IPDPS 2012: 544-556 | |
| 2011 | ||
| c44 | Masana Murase, Hideaki Komatsu, Kumiko Maeda, Shigeho Noda, Munehiro Doi, Ryutaro Himeno: A parallel programming framework orchestrating multiple languages and architectures. Conf. Computing Frontiers 2011: 22 | |
| c43 | Toshio Suganuma, Akira Koseki, Kazuaki Ishizaki, Yohei Ueda, Ken Mizuno, Daniel Silva, Hideaki Komatsu, Toshio Nakatani: Distributed and fault-tolerant execution framework for transaction processing. SYSTOR 2011: 2 | |
| 2010 | ||
| c42 | Arquimedes Canedo, Takeo Yoshizawa, Hideaki Komatsu: Automatic parallelization of simulink applications. CGO 2010: 151-159 | |
| c41 | Rei Odaira, Takuya Nakaike, Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani: Coloring-based coalescing for graph coloring register allocation. CGO 2010: 160-169 | |
| c40 | Arquimedes Canedo, Takeo Yoshizawa, Hideaki Komatsu: Skewed pipelining for parallel simulink simulations. DATE 2010: 891-896 | |
| c39 | Kazuaki Ishizaki, Ken Mizuno, Toshio Suganuma, Daniel Silva, Akira Koseki, Hideaki Komatsu, Yohei Ueda, Toshio Nakatani: Parallel programming framework for large batch transaction processing on scale-out systems. SYSTOR 2010 | |
| c38 | Goh Kondoh, Hideaki Komatsu: Dynamic binary translation specialized for embedded systems. VEE 2010: 157-166 | |
| 2009 | ||
| c37 | Hiroshi Inoue, Hideaki Komatsu, Toshio Nakatani: A study of memory management for web-based applications on multicore processors. PLDI 2009: 386-396 | |
| 2007 | ||
| c36 | Hiroshi Inoue, Takao Moriyama, Hideaki Komatsu, Toshio Nakatani: AA-Sort: A New Parallel Sorting Algorithm for Multi-Core SIMD Processors. PACT 2007: 189-198 | |
| c35 | Moriyoshi Ohara, Hangu Yeo, Frank Savino, Giridharan Iyengar, Leiguang Gong, Hiroshi Inoue, Hideaki Komatsu, Vadim Sheinin, Shahrokh Daijavad: Accelerating Mutual-Information-Based Linear Registration on the Cell Broadband Engine Processor. ICME 2007: 272-275 | |
| c34 | Moriyoshi Ohara, Hangu Yeo, Frank Savino, Giridharan Iyengar, Leiguang Gong, Hiroshi Inoue, Hideaki Komatsu, Vadim Sheinin, Shahrokh Daijavad, Bradley Erickson: Real-Time Mutual-Information-Based Linear Registration on the Cell Broadband Engine Processor. ISBI 2007: 33-36 | |
| c33 | Masaki Kataoka, Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa: Non-Retrial Register Allocation and its Spill Optimization Method. PDPTA 2007: 1047- | |
| c32 | Kiyokuni Kawachiya, Kazunori Ogata, Daniel Silva, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani: Cloneable JVM: a new approach to start isolated java applications faster. VEE 2007: 1-11 | |
| 2006 | ||
| j14 | Moriyoshi Ohara, Hiroshi Inoue, Yukihiko Sohda, Hideaki Komatsu, Toshio Nakatani: MPI microtask for programming the Cell Broadband EngineTM processor. IBM Systems Journal 45(1): 85-102 (2006) | |
| j13 | Takeshi Ogasawara, Hideaki Komatsu, Toshio Nakatani: EDO: Exception-directed optimization in java. ACM Trans. Program. Lang. Syst. 28(1): 70-105 (2006) | |
| j12 | Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani: Effective sign extension elimination for java. ACM Trans. Program. Lang. Syst. 28(1): 106-133 (2006) | |
| c31 | Motohiro Kawahito, Hideaki Komatsu, Takao Moriyama, Hiroshi Inoue, Toshio Nakatani: A new idiom recognition framework for exploiting hardware-assist instructions. ASPLOS 2006: 382-393 | |
| c30 | Kazunori Ogata, Tamiya Onodera, Kiyokuni Kawachiya, Hideaki Komatsu, Toshio Nakatani: Replay compilation: improving debuggability of a just-in-time compiler. OOPSLA 2006: 241-252 | |
| c29 | Takuya Nakaike, Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani: Profile-based global live-range splitting. PLDI 2006: 216-227 | |
| 2005 | ||
| j11 | Toshio Suganuma, Toshiaki Yasue, Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani: Design and evaluation of dynamic optimizations for a Java just-in-time compiler. ACM Trans. Program. Lang. Syst. 27(4): 732-785 (2005) | |
| 2004 | ||
| j10 | Toshio Suganuma, Takeshi Ogasawara, Kiyokuni Kawachiya, Mikio Takeuchi, Kazuaki Ishizaki, Akira Koseki, Tatsushi Inagaki, Toshiaki Yasue, Motohiro Kawahito, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani: Evolution of a Java just-in-time compiler for IA-32 platforms. IBM Journal of Research and Development 48(5-6): 767-796 (2004) | |
| j9 | Toshiaki Yasue, Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani: Structural Path Profiling: An Efficient Online Path Profiling Framework for Just-In-Time Compilers. J. Instruction-Level Parallelism 6 (2004) | |
| j8 | Takeshi Ogasawara, Hideaki Komatsu, Toshio Nakatani: Optimizing precision overhead for x86 processors. Softw., Pract. Exper. 34(9): 875-893 (2004) | |
| j7 | Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani: Partial redundancy elimination for access expressions by speculative code motion. Softw., Pract. Exper. 34(11): 1065-1090 (2004) | |
| c28 | Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani: Instruction combining for coalescing memory accesses using global code motion. Memory System Performance 2004: 2-11 | |
| c27 | Takeshi Ogasawara, Hideaki Komatsu, Toshio Nakatani: TO-Lock: Removing Lock Overhead Using the Owners' Temporal Locality. IEEE PACT 2004: 255-266 | |
| 2003 | ||
| j6 | Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani: Eliminating Exception Constraints of Java Programs for IA-64. J. Instruction-Level Parallelism 5 (2003) | |
| c26 | Akira Koseki, Hideaki Komatsu, Toshio Nakatani: Spill Code Minimization by Spill Code Motion. IEEE PACT 2003: 125-134 | |
| c25 | Toshiaki Yasue, Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani: An Efficient Online Path Profiling Framework for Java Just-In-Time Compilers. IEEE PACT 2003: 148-158 | |
| c24 | Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani: Integrated Prepass Scheduling for a Java Just-In-Time Compiler on the IA-64 Architecture. CGO 2003: 159-168 | |
| c23 | Mikio Takeuchi, Hideaki Komatsu, Toshio Nakatani: A new speculation technique to optimize floating-point performance while preserving bit-by-bit reproducibility. ICS 2003: 305-315 | |
| c22 | Kazuaki Ishizaki, Mikio Takeuchi, Kiyokuni Kawachiya, Toshio Suganuma, Osamu Gohda, Tatsushi Inagaki, Akira Koseki, Kazunori Ogata, Motohiro Kawahito, Toshiaki Yasue, Takeshi Ogasawara, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani: Effectiveness of cross-platform optimizations for a java just-in-time compiler. OOPSLA 2003: 187-204 | |
| c21 | Tatsushi Inagaki, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani: Stride prefetching by dynamically inspecting objects. PLDI 2003: 269-277 | |
| 2002 | ||
| c20 | Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani: Eliminating Exception Constraints of Java Programs for IA-64. IEEE PACT 2002: 259-268 | |
| c19 | Kazunori Ogata, Hideaki Komatsu, Toshio Nakatani: Bytecode fetch optimization for a Java interpreter. ASPLOS 2002: 58-67 | |
| c18 | Takeshi Ogasawara, Hideaki Komatsu, Toshio Nakatani: Optimizing Precision Overhead for x86 Processors. Java Virtual Machine Research and Technology Symposium 2002: 41-50 | |
| c17 | Akira Koseki, Hideaki Komatsu, Toshio Nakatani: Preference-Directed Graph Coloring. PLDI 2002: 33-44 | |
| c16 | Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani: Effective Sign Extension Elimination. PLDI 2002: 187-198 | |
| 2001 | ||
| c15 | Takeshi Ogasawara, Hideaki Komatsu, Toshio Nakatani: A Study of Exception Handling and Its Dynamic Optimization in Java. OOPSLA 2001: 83-95 | |
| c14 | Toshio Suganuma, Toshiaki Yasue, Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani: A Dynamic Optimization Framework for a Java Just-In-Time Compiler. OOPSLA 2001: 180-194 | |
| 2000 | ||
| j5 | Kazuaki Ishizaki, Motohiro Kawahito, Toshiaki Yasue, Mikio Takeuchi, Takeshi Ogasawara, Toshio Suganuma, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani: Design, implementation, and evaluation of optimizations in a JavaTM Just-In-Time compiler. Concurrency - Practice and Experience 12(6): 457-475 (2000) | |
| j4 | Toshio Suganuma, Takeshi Ogasawara, Mikio Takeuchi, Toshiaki Yasue, Motohiro Kawahito, Kazuaki Ishizaki, Hideaki Komatsu, Toshio Nakatani: Overview of the IBM Java Just-in-Time Compiler. IBM Systems Journal 39(1): 175-193 (2000) | |
| j3 | Kazuaki Ishizaki, Hideaki Komatsu, Toshio Nakatani: A Loop Transformation Algorithm for Communication Overlapping. International Journal of Parallel Programming 28(2): 135-154 (2000) | |
| c13 | Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani: Effective Null Pointer Check Elimination Utilizing Hardware Trap. ASPLOS 2000: 139-149 | |
| c12 | Kazuaki Ishizaki, Motohiro Kawahito, Toshiaki Yasue, Hideaki Komatsu, Toshio Nakatani: A study of devirtualization techniques for a JavaTM Just-In-Time compiler. OOPSLA 2000: 294-310 | |
| 1999 | ||
| c11 | Kazuaki Ishizaki, Motohiro Kawahito, Toshiaki Yasue, Mikio Takeuchi, Takeshi Ogasawara, Toshio Suganuma, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani: Design, Implementation, and Evaluation of Optimizations in a Just-in-Time Compiler. Java Grande 1999: 119-128 | |
| 1998 | ||
| j2 | Nobuhiro Kondo, Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa: A method for applying loop unrolling and software pipelining to instruction-level parallel architectures. Systems and Computers in Japan 29(9): 62-73 (1998) | |
| 1997 | ||
| c10 | Akira Koseki, Yoshiaki Fukazawa, Hideaki Komatsu: A Register Allocation Technique Using Register Existence Graph. ICPP 1997: 404-411 | |
| c9 | Kazuaki Ishizaki, Hideaki Komatsu, Toshio Nakatani: An Algorithm for Automatic Detection of Loop Indices for Communication Overlapping. ISHPC 1997: 217-230 | |
| c8 | Takeshi Ogasawara, Hideaki Komatsu: A Method for Runtime Recognition of Collective Communication on Distributed-Memory Multiprocessors. ISHPC 1997: 361-370 | |
| c7 | Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa: A method for estimating optimal unrolling times for nested loops. ISPAN 1997: 376-382 | |
| 1996 | ||
| c6 | Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani: Detection and Global Optimization of Reduction Operations for Distributed Parallel Machines. International Conference on Supercomputing 1996: 18-25 | |
| c5 | Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa: A Register Allocation Technique Using Guarded PDG. International Conference on Supercomputing 1996: 270-277 | |
| 1995 | ||
| c4 | Kazuaki Ishizaki, Hideaki Komatsu: A Loop Parallelization Algorithm for HPF Compilers. LCPC 1995: 176-190 | |
| 1992 | ||
| j1 | Yasuo Asakawa, Hideaki Komatsu, Hiroaki Etoh, Toshiyuki Hama, Keiichi Maruyama: Zephyr: Toward true compiler-based programming in Prolog. IBM Journal of Research and Development 36(3): 391-408 (1992) | |
| 1987 | ||
| c3 | Hiroaki Etoh, Naoyuki Tamura, Yasuo Asakawa, Toshiyuki Hama, Hideaki Komatsu: Introduction of a Package System into Prolog. LP 1987: 105-112 | |
| 1986 | ||
| c2 | Toshiaki Kurokawa, Naoyuki Tamura, Yasuo Asakawa, Hideaki Komatsu: A Very Fast Prolog Complier on Multiple Architectures. FJCC 1986: 963-968 | |
| c1 | Hideaki Komatsu, Naoyuki Tamura, Yasuo Asakawa, Toshiaki Kurokawa: An Optimizing Prolog Compiler. LP 1986: 104-115 | |
Colors in the list of coauthors
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