| 2009 | ||
|---|---|---|
| c7 | Amirali Shayan Arani, Xiang Hu, He Peng, Wenjian Yu, Wanping Zhang, Chung-Kuan Cheng, Mikhail Popovich, Xiaoming Chen, Lew Chua-Eoan, Xiaohua Kong: Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network. ISQED 2009: 576-581 | |
| 2006 | ||
| j2 | Xiaohua Kong, Radu Negulescu: Semihiding operators and active-edge specification. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1831-1846 (2006) | |
| 2004 | ||
| c6 | Xiaohua Kong, Radu Negulescu: Bolstering Faith in GasP Circuits through Formal Verification. ASYNC 2004: 113-124 | |
| c5 | Nisrine Saadallah, Xiaohua Kong, Radu Negulescu: High-Speed Reduced Stack Dual Lock Circuits. ASYNC 2004: 219-228 | |
| 2003 | ||
| j1 | Xiaohua Kong, Radu Negulescu, Larry Weidong Ying: Refinement-based formal verification with heterogeneous timing. STTT 4(3): 359-370 (2003) | |
| 2001 | ||
| c4 | Radu Negulescu, Xiaohua Kong: Semi-Hiding Operators and the Analysis of Active-Edge Specifications for Digital Circuits. ACSD 2001: 189- | |
| c3 | Xiaohua Kong, Radu Negulescu: Formal verification of pulse-mode asynchronous circuits. ASP-DAC 2001: 347-352 | |
| c2 | Xiaohua Kong, Radu Negulescu, Larry Weidong Ying: Refinement-Based Formal Verification of Asynchronous Wrappers for Independently Clocked Domains in Systems on Chip. CHARME 2001: 370-385 | |
| c1 | Xiaohua Kong, Radu Negulescu: Formal Verification of Peephole Optimizations in Asynchronous Circuits. FORTE 2001: 219-234 | |
| 1 | Amirali Shayan Arani | |
| 2 | Xiaoming Chen | |
| 3 | Chung-Kuan Cheng | |
| 4 | Lew Chua-Eoan | |
| 5 | Xiang Hu | |
| 6 | Radu Negulescu | |
| 7 | He Peng | |
| 8 | Mikhail Popovich | |
| 9 | Nisrine Saadallah | |
| 10 | Larry Weidong Ying | |
| 11 | Wenjian Yu | |
| 12 | Wanping Zhang |
Colors in the list of coauthors
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