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William V. Kritikos
2010 – today
- 2012
[j2]William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French: Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. Int. J. Reconfig. Comp. 2012 (2012)- [j1]Andrew G. Schmidt, William V. Kritikos, Shanyuan Gao, Ron Sass: An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing. Int. J. Reconfig. Comp. 2012 (2012)
- 2011
- [c7]William V. Kritikos, Yamuna Rajasekhar, Andrew G. Schmidt, Ron Sass: A Radix Tree Router for Scalable FPGA Networks. FPL 2011: 76-81
- 2010
- [c6]Andrew G. Schmidt, William V. Kritikos, Ron Sass, Erik K. Anderson, Matthew French: Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. ReConFig 2010: 334-339
2000 – 2009
- 2009
- [c5]Andrew G. Schmidt, William V. Kritikos, Rahul R. Sharma, Ron Sass: AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. FCCM 2009: 271-274
- 2008
- [c4]Yamuna Rajasekhar, Yashodhan Phatak, Andrew G. Schmidt, William V. Kritikos, Ron Sass: FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. FCCM 2008: 298-299
- [c3]Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass: Reconfigurable Computing Cluster Project: Phase I Brief. FCCM 2008: 300-301
- [c2]Yamuna Rajasekhar, William V. Kritikos, Andrew G. Schmidt, Ron Sass: Teaching FPGA system design via a remote laboratory facility. FPL 2008: 687-690
- 2007
- [c1]Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka: Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. FCCM 2007: 127-140
Coauthor Index
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last updated on 2012-12-02 22:07 CET by the dblp team