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 | 2012 | |
|---|---|---|
| e1 |      | Jaan Raik, Viera Stopjaková, Heinrich Theodor Vierhaus, Witold A. Pleskacz, Raimund Ubar, Helena Kruus, Maksim Jenihhin (Eds.): IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2012, Tallinn, Estonia, April 18-20, 2012. IEEE 2012, isbn 978-1-4673-1187-8 |
| 2008 | ||
| j1 | | Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar: Hybrid BIST optimization using reseeding and test set compaction. Microprocessors and Microsystems - Embedded Hardware Design 32(5-6): 254-262 (2008) |
| 2007 | ||
| c3 | | Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar: Hybrid BIST Optimization Using Reseeding and Test Set Compaction. DSD 2007: 596-603 |
| c2 | | Gert Jervan, Helena Kruus, Elmet Orasson, Raimund Ubar: Optimization of Memory-Constrained Hybrid BIST for Testing Core-Based Systems. SIES 2007: 71-77 |
| 2002 | ||
| c1 | | Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus: A Hybrid BIST Architecture and Its Optimization for SoC Testing. ISQED 2002: 273-279 |
| 1 | Maksim Jenihhin | |
| 2 | Gert Jervan | |
| 3 | Elmet Orasson | |
| 4 | Zebo Peng | |
| 5 | Witold A. Pleskacz | |
| 6 | Jaan Raik | |
| 7 | Viera Stopjaková | |
| 8 | Raimund Ubar | |
| 9 | Heinrich Theodor Vierhaus |
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