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Viktor K. Prasanna
V. K. Prasanna Kumar
2010 – today
- 2013
[j118]Saima Aman, Yogesh Simmhan, Viktor K. Prasanna: Energy management systems: state of the art and emerging trends. IEEE Communications Magazine 51(1): 114-119 (2013)
[j117]Calin Cascaval, Pedro Trancoso, Viktor K. Prasanna: Guest Editorial: Computing Frontiers. International Journal of Parallel Programming 41(3): 355-356 (2013)
[j116]Hoang Le, Viktor K. Prasanna: A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching. IEEE Trans. Computers 62(5): 844-857 (2013)
[c286]Kiran Kumar Matam, Viktor K. Prasanna: Algorithm Design Methodology for Embedded Architectures. ARC 2013: 231-232
[c285]Da Tong, Lu Sun, Kiran Kumar Matam, Viktor K. Prasanna: High throughput and programmable online trafficclassifier on FPGA. FPGA 2013: 255-264
[c284]Swapnil Haria, Viktor K. Prasanna: AutoMapper: an automated tool for optimal hardware resource allocation for networking applications on FPGA (abstract only). FPGA 2013: 274
[c283]
[c282]Charalampos Chelmis, Viktor K. Prasanna: Exploring generative models of tripartite graphs for recommendation in social media. MSM 2013: 2- 2012
[j115]Claudia Feregrino, Miguel Arias, Kris Gaj, Viktor K. Prasanna, Marco D. Santambrogio, Ron Sass: Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10). Int. J. Reconfig. Comp. 2012 (2012)
[j114]Na Chen, Viktor K. Prasanna: Learning to Rank Complex Semantic Relationships. Int. J. Semantic Web Inf. Syst. 8(4): 1-19 (2012)
[j113]Yi-Hua E. Yang, Viktor K. Prasanna: High-Performance and Compact Architecture for Regular Expression Matching on FPGA. IEEE Trans. Computers 61(7): 1013-1025 (2012)
[j112]Hoang Le, Viktor K. Prasanna: Scalable Tree-Based Architectures for IPv4/v6 Lookup Using Prefix Partitioning. IEEE Trans. Computers 61(7): 1026-1039 (2012)
[j111]Yinglong Xia, Viktor K. Prasanna: Distributed Evidence Propagation in Junction Trees on Clusters. IEEE Trans. Parallel Distrib. Syst. 23(7): 1169-1177 (2012)
[j110]Weirong Jiang, Viktor K. Prasanna: Scalable Packet Classification on FPGA. IEEE Trans. VLSI Syst. 20(9): 1668-1680 (2012)
[c281]Alok Gautam Kumbhare, Yogesh Simmhan, Viktor K. Prasanna: Cryptonite: A Secure and Performant Data Repository on Public Clouds. IEEE CLOUD 2012: 510-517
[c280]Charalampos Chelmis, Viktor K. Prasanna: Microblogging in the Enterprise: A Few Comments are in Order. ASONAM 2012: 62-70
[c279]Charalampos Chelmis, Vikram Sorathia, Viktor K. Prasanna: Enterprise Wisdom Captured Socially. ASONAM 2012: 1228-1235
[c278]
[c277]Sotiris E. Nikoletseas, Dimitra Patroumpa, Viktor K. Prasanna, Christoforos Raptopoulos, José D. P. Rolim: Radiation Awareness in Three-Dimensional Wireless Sensor Networks. DCOSS 2012: 176-185
[c276]Yi-Hua E. Yang, Oguzhan Erdem, Viktor K. Prasanna: Scalable architecture for 135 GBPS IPv6 lookup on FPGA (abstract only). FPGA 2012: 272
[c275]Thilan Ganegedara, Viktor K. Prasanna, Gordon J. Brebner: Optimizing packet lookup in time and space on FPGA. FPL 2012: 270-276
[c274]Thilan Ganegedara, Viktor K. Prasanna: StrideBV: Single chip 400G+ packet classification. HPSR 2012: 1-6
[c273]Qu Yun, Yi-Hua E. Yang, Viktor K. Prasanna: Large-scale multi-flow regular expression matching on FPGA. HPSR 2012: 70-75
[c272]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna: Hierarchical hybrid search structure for high performance packet classification. INFOCOM 2012: 1898-1906
[c271]Jing Zhao, Yogesh Simmhan, Viktor K. Prasanna: On Presenting Apropos Provenance for Situation Awareness and Data Forensics. IPAW 2012: 250-253
[c270]Thilan Ganegedara, Viktor K. Prasanna: FPGA-based Router Virtualization: A Power Perspective. IPDPS Workshops 2012: 360-367
[c269]Nam Ma, Yinglong Xia, Viktor K. Prasanna: Task Parallel Implementation of Belief Propagation in Factor Graphs. IPDPS Workshops 2012: 1944-1953
[c268]
[c267]Qunzhi Zhou, Sreedhar Natarajan, Yogesh Simmhan, Viktor K. Prasanna: Semantic Information Modeling for Emerging Applications in Smart Grid. ITNG 2012: 775-782
[c266]Swapnil Haria, Thilan Ganegedara, Viktor K. Prasanna: Power-efficient and scalable virtual router architecture on FPGA. ReConFig 2012: 1-7
[c265]Da Tong, Yi-Hua E. Yang, Viktor K. Prasanna: A memory efficient IPv6 lookup engine on FPGA. ReConFig 2012: 1-6
[c264]Nam Ma, Yinglong Xia, Viktor K. Prasanna: Parallel Exact Inference on Multicore Using MapReduce. SBAC-PAD 2012: 187-194
[c263]Qunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna: Incorporating Semantic Knowledge into Dynamic Data Processing for Smart Power Grids. International Semantic Web Conference (2) 2012: 257-273
[c262]Charalampos Chelmis, Viktor K. Prasanna: Predicting Communication Intention in Social Networks. SocialCom/PASSAT 2012: 184-194
[c261]Na Chen, Qian-Yi Zhou, Viktor K. Prasanna: Understanding web images by object relation network. WWW 2012: 291-300
[e19]Tilman Wolf, Andrew W. Moore, Viktor K. Prasanna (Eds.): Symposium on Architecture for Networking and Communications Systems, ANCS '12, Austin, TX, USA - October 29 - 30, 2012. ACM 2012, ISBN 978-1-4503-1685-9- 2011
[j109]Jing Zhao, Viktor K. Prasanna, Karthik Gomadam: A Semantic-Based Approach for Handling Incomplete and Inaccurate Provenance in Reservoir Engineering. Int. J. Semantic Computing 5(4): 383-406 (2011)
[j108]Jing Zhao, Yogesh Simmhan, Karthik Gomadam, Viktor K. Prasanna: Querying Provenance Information in Distributed Environments. I. J. Comput. Appl. 18(3): 196-215 (2011)
[j107]Yinglong Xia, Viktor K. Prasanna: Parallel evidence propagation on multicore processors. The Journal of Supercomputing 57(2): 189-202 (2011)
[c260]Yogesh Simmhan, Alok Gautam Kumbhare, Baohua Cao, Viktor K. Prasanna: An Analysis of Security and Privacy Issues in Smart Grid Software Architectures on Clouds. IEEE CLOUD 2011: 582-589
[c259]Yi-Hua E. Yang, Viktor K. Prasanna: Optimizing Regular Expression Matching with SR-NFA on Multi-Core Systems. PACT 2011: 424-433
[c258]
[c257]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna, Cüneyt F. Bazlamaçci: Hybrid data structure for IP lookup in virtual routers using FPGAs. ASAP 2011: 95-102
[c256]Daniel Zinn, Quinn Hart, Timothy M. McPhillips, Bertram Ludäscher, Yogesh Simmhan, Michail Giakkoupis, Viktor K. Prasanna: Towards Reliable, Performant Workflows for Streaming-Applications on Cloud Platforms. CCGRID 2011: 235-244
[c255]Qunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna: Towards an inexact semantic complex event processing framework. DEBS 2011: 401-402
[c254]Yi-Hua Edward Yang, Oguzhan Erdem, Viktor K. Prasanna: High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined Search. FCCM 2011: 77-80
[c253]Hoang Le, Weirong Jiang, Viktor K. Prasanna: Memory-Efficient IPv4/v6 Lookup on FPGAs Using Distance-Bounded Path Compression. FCCM 2011: 242-249
[c252]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna, Cüneyt F. Bazlamaçci: Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs. FCCM 2011: 253
[c251]Hoang Le, Thilan Ganegedara, Viktor K. Prasanna: Memory-efficient and scalable virtual routers using FPGA. FPGA 2011: 257-266
[c250]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna: Clustered Hierarchical Search Structure for Large-Scale Packet Classification on FPGA. FPL 2011: 201-206
[c249]Thilan Ganegedara, Hoang Le, Viktor K. Prasanna: Towards On-the-Fly Incremental Updates for Virtualized Routers on FPGA. FPL 2011: 213-218
[c248]Thilan Ganegedara, Weirong Jiang, Viktor K. Prasanna: Multiroot: Towards Memory-Efficient Router Virtualization. ICC 2011: 1-5
[c247]Saima Aman, Yogesh Simmhan, Viktor K. Prasanna: Improving Energy Use Forecast for Campus Micro-grids Using Indirect Indicators. ICDM Workshops 2011: 389-397
[c246]Yi-Hua E. Yang, Viktor K. Prasanna: Space-time tradeoff in regular expression matching with semi-deterministic finite automata. INFOCOM 2011: 1853-1861
[c245]Yaxuan Qi, Kai Wang, Jeffrey Fong, Yibo Xue, Jun Li, Weirong Jiang, Viktor K. Prasanna: FEACAN: Front-end acceleration for content-aware network processing. INFOCOM 2011: 2114-2122
[c244]Nam Ma, Yinglong Xia, Viktor K. Prasanna: Exploring Weak Dependencies in DAG Scheduling. IPDPS Workshops 2011: 591-598
[c243]Yinglong Xia, Viktor K. Prasanna: Self-Adaptive Evidence Propagation on Manycore Processors. IPDPS Workshops 2011: 1407-1416
[c242]Qu Yun, Yi-Hua E. Yang, Viktor K. Prasanna: Multi-stream Regular Expression Matching on FPGA. ReConFig 2011: 86-91
[c241]Lu Sun, Hoang Le, Viktor K. Prasanna: Optimizing Decomposition-Based Packet Classification Implementation on FPGAs. ReConFig 2011: 170-175
[c240]Nam Ma, Yinglong Xia, Viktor K. Prasanna: Data Parallelism for Belief Propagation in Factor Graphs. SBAC-PAD 2011: 56-63
[c239]Jing Zhao, Karthik Gomadam, Viktor K. Prasanna: Predicting Missing Provenance Using Semantic Associations in Reservoir Engineering. ICSC 2011: 141-148
[c238]Sushil K. Prasad, Almadena Yu. Chtchelkanova, Sajal K. Das, Frank Dehne, Mohamed G. Gouda, Anshul Gupta, Joseph JáJá, Krishna Kant, Anita La Salle, Richard LeBlanc, Manish Lumsdaine, David A. Padua, Manish Parashar, Viktor K. Prasanna, Yves Robert, Arnold L. Rosenberg, Sartaj Sahni, Behrooz Shirazi, Alan Sussman, Charles C. Weems, Jie Wu: NSF/IEEE-TCPP curriculum initiative on parallel and distributed computing: core topics for undergraduates. SIGCSE 2011: 617-618
[c237]Charalampos Chelmis, Viktor K. Prasanna: Social Networking Analysis: A State of the Art and the Effect of Semantics. SocialCom/PASSAT 2011: 531-536
[e18]Calin Cascaval, Pedro Trancoso, Viktor K. Prasanna (Eds.): Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia, Italy, May 3-5, 2011. ACM 2011, ISBN 978-1-4503-0698-0
[i1]Weirong Jiang, Hoang Le, Viktor K. Prasanna: Bidirectional Pipelining for Scalable IP Lookup and Packet Classification. CoRR abs/1107.5372 (2011)- 2010
[j106]Lionel Torres, Viktor K. Prasanna: Selected Papers from ReconFig 2009 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2009). Int. J. Reconfig. Comp. 2010 (2010)
[j105]Yinglong Xia, Viktor K. Prasanna: Parallel exact inference on the Cell Broadband Engine processor. J. Parallel Distrib. Comput. 70(5): 558-572 (2010)
[j104]Yinglong Xia, Viktor K. Prasanna: Scalable Node-Level Computation Kernels for Parallel Exact Inference. IEEE Trans. Computers 59(1): 103-115 (2010)
[j103]Animesh Pathak, Viktor K. Prasanna: Energy-Efficient Task Mapping for Data-Driven Sensor Network Macroprogramming. IEEE Trans. Computers 59(7): 955-968 (2010)
[c236]Yinglong Xia, Viktor K. Prasanna: Collaborative scheduling of DAG structured computations on multicore processors. Conf. Computing Frontiers 2010: 63-72
[c235]
[c234]Yi-Hua E. Yang, Viktor K. Prasanna: High throughput and large capacity pipelined dynamic search tree on FPGA. FPGA 2010: 83-92
[c233]Hoang Le, Yi-Hua E. Yang, Viktor K. Prasanna: Memory efficient string matching: a modular approach on FPGAs (abstract only). FPGA 2010: 285
[c232]Thilan Ganegedara, Yi-Hua E. Yang, Viktor K. Prasanna: Automation Framework for Large-Scale Regular Expression Matching on FPGA. FPL 2010: 50-55
[c231]Weirong Jiang, Viktor K. Prasanna, Norio Yamagaki: Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA. FPL 2010: 394-399
[c230]Qingbo Wang, Weirong Jiang, Yinglong Xia, Viktor K. Prasanna: A message-passing multi-softcore architecture on FPGA for Breadth-first Search. FPT 2010: 70-77
[c229]Yaxuan Qi, Jeffrey Fong, Weirong Jiang, Bo Xu, Jun Li, Viktor K. Prasanna: Multi-dimensional packet classification on FPGA: 100 Gbps and beyond. FPT 2010: 241-248
[c228]
[c227]Weirong Jiang, Viktor K. Prasanna: Architecture-aware data structure optimization for green IP lookup. HPSR 2010: 113-118
[c226]Hyeran Jeon, Yinglong Xia, Viktor K. Prasanna: Parallel Exact Inference on a CPU-GPGPU Heterogenous System. ICPP 2010: 61-70
[c225]Yi-Hua Edward Yang, Hoang Le, Viktor K. Prasanna: High Performance Dictionary-Based String Matching for Deep Packet Inspection. INFOCOM 2010: 86-90
[c224]Thilan Ganegedara, Weirong Jiang, Viktor K. Prasanna: FRuG: A benchmark for packet forwarding in future networks. IPCCC 2010: 231-238
[c223]Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasanna: Scalable multi-pipeline architecture for high performance multi-pattern string matching. IPDPS 2010: 1-12
[c222]
[c221]Yi-Hua E. Yang, Viktor K. Prasanna, Chenqian Jiang: Head-body partitioned string matching for Deep Packet Inspection with scalable and attack-resilient performance. IPDPS 2010: 1-11
[c220]Qunzhi Zhou, Viktor K. Prasanna: Workflow management of simulation based computation processes in transportation domain. IRI 2010: 19-24
[c219]Fan Sun, Jing Zhao, Karthik Gomadam, Viktor K. Prasanna: Provenance Collection in Reservoir Management Workflow Environments. ITNG 2010: 82-87
[c218]Tao Zhu, Amol Bakshi, Viktor K. Prasanna, Karthik Gomadam: Applying Semantic Web Techniques to Reservoir Engineering: Challenges and Experiences from Event Modeling. ITNG 2010: 586-591
[c217]Yinglong Xia, Viktor K. Prasanna, James Li: Hierarchical Scheduling of DAG Structured Computations on Manycore Processors with Dynamic Thread Grouping. JSSPP 2010: 154-174
[c216]Yinglong Xia, Viktor K. Prasanna: Distributed Evidence Propagation in Junction Trees. SBAC-PAD 2010: 143-150
[c215]Jing Zhao, Na Chen, Karthik Gomadam, Viktor K. Prasanna: Integrating Provenance Information in Reservoir Engineering. Web Intelligence 2010: 46-49
[e17]Viktor K. Prasanna, Jürgen Becker, René Cumplido (Eds.): ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings. IEEE Computer Society 2010
2000 – 2009
- 2009
[j102]Yi-Hua Edward Yang, Viktor K. Prasanna: Software Toolchain for Large-Scale RE-NFA Construction on FPGA. Int. J. Reconfig. Comp. 2009 (2009)
[j101]Weirong Jiang, Viktor K. Prasanna: Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines. J. Parallel Distrib. Comput. 69(9): 778-789 (2009)
[c214]Weirong Jiang, Viktor K. Prasanna: A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification. ASAP 2009: 24-31
[c213]
[c212]Qingbo Wang, Viktor K. Prasanna: Multi-Core Architecture on FPGA for Large Dictionary String Matching. FCCM 2009: 96-103
[c211]Yi-Hua Edward Yang, Viktor K. Prasanna: Memory-Efficient Pipelined Architecture for Large-Scale String Matching. FCCM 2009: 104-111
[c210]
[c209]Weirong Jiang, Viktor K. Prasanna: Large-scale wire-speed packet classification on FPGAs. FPGA 2009: 219-228
[c208]Weirong Jiang, Viktor K. Prasanna: Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification. GLOBECOM 2009: 1-6
[c207]Weirong Jiang, Viktor K. Prasanna: Scalable Packet Classification: Cutting or Merging? ICCCN 2009: 1-6
[c206]Weirong Jiang, Viktor K. Prasanna: Reducing dynamic power dissipation in pipelined forwarding engines. ICCD 2009: 144-149
[c205]Sudhir Vinjamuri, Viktor K. Prasanna: Transitive closure on the cell broadband engine: A study on self-scheduling in a multicore processor. IPDPS 2009: 1-11
[c204]Sudhir Vinjamuri, Viktor K. Prasanna: Hierarchical Dependency Graphs: Abstraction and Methodology for Mapping Systolic Array Designs to Multicore Processors. PaCT 2009: 284-298
[c203]Yinglong Xia, Xiaojun Feng, Viktor K. Prasanna: Parallel Evidence Propagation on Multicore Processors. PaCT 2009: 377-391
[c202]Weirong Jiang, Viktor K. Prasanna: Field-split parallel architecture for high performance multi-match packet classification using FPGAs. SPAA 2009: 188-196
[e16]Yuanyuan Yang, Manish Parashar, Rajeev Muralidhar, Viktor K. Prasanna (Eds.): 16th International Conference on High Performance Computing, HiPC 2009, December 16-19, 2009, Kochi, India, Proceedings. IEEE 2009
[e15]Viktor K. Prasanna, Lionel Torres, René Cumplido (Eds.): ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings. IEEE Computer Society 2009, ISBN 978-0-7695-3917-1- 2008
[b1]Amol B. Bakshi, Viktor K. Prasanna: Architecture-Independent Programming for Wireless Sensor Networks. Wiley 2008, ISBN 978-0-471-77889-9, pp. I-XV, 1-187
[j100]Gerald R. Morris, Viktor K. Prasanna: A pipelined-loop-compatible architecture and algorithm to reduce variable-length sets of floating-point data on a reconfigurable computer. J. Parallel Distrib. Comput. 68(7): 913-921 (2008)
[j99]Ling Zhuo, Viktor K. Prasanna: High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware. IEEE Trans. Computers 57(8): 1057-1071 (2008)
[j98]Ling Zhuo, Viktor K. Prasanna: Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. IEEE Trans. Computers 57(12): 1661-1675 (2008)
[j97]Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna: Data Gathering with Tunable Compression in Sensor Networks. IEEE Trans. Parallel Distrib. Syst. 19(2): 276-287 (2008)
[j96]Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor K. Prasanna: Accelerating Molecular Dynamics Simulations with Reconfigurable Computers. IEEE Trans. Parallel Distrib. Syst. 19(6): 764-778 (2008)
[j95]Jingzhao Ou, Viktor K. Prasanna: A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft Processors. IEEE Trans. VLSI Syst. 16(1): 45-56 (2008)
[j94]Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna: Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores. IEEE Trans. VLSI Syst. 16(2): 167-176 (2008)
[c201]Ramakrishna Soma, Viktor K. Prasanna: A Data Partitioning Approach for Parallelizing Rule Based Inferencing for Materialized OWL Knowledge Bases. ISCA PDCCS 2008: 19-25
[c200]Yi-Hua E. Yang, Weirong Jiang, Viktor K. Prasanna: Compact architecture for high-throughput regular expression matching on FPGA. ANCS 2008: 30-39
[c199]Weirong Jiang, Viktor K. Prasanna: Multi-terabit ip lookup using parallel bidirectional pipelines. Conf. Computing Frontiers 2008: 241-250
[c198]Animesh Pathak, Viktor K. Prasanna: Energy-Efficient Task Mapping for Data-Driven Sensor Network Macroprogramming. DCOSS 2008: 516-524
[c197]Hoang Le, Weirong Jiang, Viktor K. Prasanna: A SRAM-based Architecture for Trie-based IP Lookup Using FPGA. FCCM 2008: 33-42
[c196]Ling Zhuo, Qingbo Wang, Viktor K. Prasanna: Matrix Computations on Heterogeneous Reconfigurable Systems. FCCM 2008: 310-311
[c195]Hoang Le, Weirong Jiang, Viktor K. Prasanna: Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA. FPL 2008: 137-142
[c194]Weirong Jiang, Viktor K. Prasanna: Multi-Way Pipelining for Power-Efficient IP Lookup. GLOBECOM 2008: 2339-243
[c193]Ramakrishna Soma, Viktor K. Prasanna: Parallel Inferencing for OWL Knowledge Bases. ICPP 2008: 75-82
[c192]Weirong Jiang, Qingbo Wang, Viktor K. Prasanna: Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup. INFOCOM 2008: 1786-1794
[c191]Weirong Jiang, Viktor K. Prasanna: Towards Green Routers: Depth-Bounded Multi-Pipeline Architecture for Power-Efficient IP Lookup. IPCCC 2008: 185-192
[c190]David A. Bader, Viktor K. Prasanna: DOSA: design optimizer for scientific applications. IPDPS 2008: 1-5
[c189]Weirong Jiang, Viktor K. Prasanna: Parallel IP lookup using multiple SRAM-based pipelines. IPDPS 2008: 1-14
[c188]Yinglong Xia, Viktor K. Prasanna: Junction tree decomposition for parallel exact inference. IPDPS 2008: 1-12
[c187]Qunzhi Zhou, Amol Bakshi, Viktor K. Prasanna, Ramakrishna Soma: Towards an integrated modeling and simulation framework for freight transportation in metropolitan areas. IRI 2008: 280-285
[c186]Fan Sun, Viktor K. Prasanna, Amol Bakshi, Laurent Pianelo: Workflow instance detection: Toward a knowledge capture methodology for smart oilfields. IRI 2008: 363-369
[c185]Cong Zhang, Amol Bakshi, Viktor K. Prasanna: Data component based management of reservoir simulation models. IRI 2008: 386-392
[c184]Ramakrishna Soma, Viktor K. Prasanna: Detecting Dirty Queries during Iterative Development of OWL Based Applications. OTM Conferences (2) 2008: 1500-1516
[c183]Yi-Hua E. Yang, Viktor K. Prasanna: Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA. ReConFig 2008: 73-78
[c182]Yinglong Xia, Viktor K. Prasanna: Parallel exact inference on the cell broadband engine processor. SC 2008: 58
[e14]P. Sadayappan, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna (Eds.): High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings. Lecture Notes in Computer Science 5374, Springer 2008, ISBN 978-3-540-89893-1- 2007
[j93]Gerald R. Morris, Viktor K. Prasanna: Sparse Matrix Computations on Reconfigurable Hardware. IEEE Computer 40(3): 58-64 (2007)
[j92]Xiaorong Li, Bharadwaj Veeravalli, Viktor K. Prasanna: A window-assisted video partitioning strategy for partitioning and caching video streams in distributed multimedia systems. J. Parallel Distrib. Comput. 67(6): 738-754 (2007)
[j91]Bharadwaj Veeravalli, Chaoyang Chen, Viktor K. Prasanna: Fault-tolerant analysis for multiple servers movie retrieval strategy for distributed multimedia applications. Multimedia Tools Appl. 32(1): 1-27 (2007)
[j90]Sumit Mohanty, Viktor K. Prasanna: A model-based extensible framework for efficient application design using FPGA. ACM Trans. Design Autom. Electr. Syst. 12(2) (2007)
[j89]Ling Zhuo, Viktor K. Prasanna: Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems. IEEE Trans. Parallel Distrib. Syst. 18(4): 433-448 (2007)
[j88]Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna: High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs. IEEE Trans. Parallel Distrib. Syst. 18(10): 1377-1392 (2007)
[j87]Bo Hong, Viktor K. Prasanna: Adaptive Allocation of Independent Tasks to Maximize Throughput. IEEE Trans. Parallel Distrib. Syst. 18(10): 1420-1435 (2007)
[c181]Ramakrishna Soma, Amol Bakshi, Viktor K. Prasanna: An Architecture of a Workflow System for Integrated Asset Management in the Smart Oil Field Domain. IEEE SCW 2007: 191-198
[c180]Ramakrishna Soma, Amol Bakshi, Viktor K. Prasanna: A Semantic Framework for Integrated Asset Management in Smart Oilfields. CCGRID 2007: 119-126
[c179]Animesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco: A Compilation Framework for Macroprogramming Networked Sensors. DCOSS 2007: 189-204
[c178]
[c177]Weirong Jiang, Viktor K. Prasanna: A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup. Hot Interconnects 2007: 83-90
[c176]David A. Bader, Viktor K. Prasanna: DOSA: Design Optimizer for Scientific Applications. IPDPS 2007: 1-6
[c175]Ling Zhuo, Viktor K. Prasanna: Hardware/Software Co-Design for Matrix Computations on Reconfigurable Computing Systems. IPDPS 2007: 1-10
[c174]Cong Zhang, Amol Bakshi, Viktor K. Prasanna: ModelML: a Markup Language for Automatic Model Synthesis. IRI 2007: 317-322
[c173]Luca Mottola, Animesh Pathak, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco: Enabling Scope-Based Interactions in Sensor Network Macroprogramming. MASS 2007: 1-9
[c172]
[c171]Ling Zhuo, Viktor K. Prasanna: Optimizing Matrix Multiplication on Heterogeneous Reconfigurable Systems. PARCO 2007: 561-568
[c170]Animesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco: Expressing Sensor Network Interaction Patterns Using Data-Driven Macroprogramming. PerCom Workshops 2007: 255-260
[c169]Yinglong Xia, Viktor K. Prasanna: Node Level Primitives for Parallel Exact Inference. SBAC-PAD 2007: 221-228
[e13]Srinivas Aluru, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna (Eds.): High Performance Computing - HiPC 2007, 14th International Conference, Goa, India, December 18-21, 2007, Proceedings. Lecture Notes in Computer Science 4873, Springer 2007, ISBN 978-3-540-77219-4
[e12]Hai Jin, Omer F. Rana, Yi Pan, Viktor K. Prasanna (Eds.): Algorithms and Architectures for Parallel Processing, 7th International Conference, ICA3PP 2007, Hangzhou, China, June 11-14, 2007, Proceedings. Lecture Notes in Computer Science 4494, Springer 2007, ISBN 978-3-540-72904-4- 2006
[j86]Jong-Kook Kim, Debra A. Hensgen, Taylor Kidd, Howard Jay Siegel, David St. John, Cynthia E. Irvine, Timothy E. Levin, N. Wayne Porter, Viktor K. Prasanna, Richard F. Freund: A flexible multi-dimensional QoS performance measure framework for distributed heterogeneous systems. Cluster Computing 9(3): 281-296 (2006)
[j85]Michael Penner, Viktor K. Prasanna: Cache-Friendly implementations of transitive closure. ACM Journal of Experimental Algorithmics 11 (2006)
[j84]Bo Hong, Viktor K. Prasanna: Maximum lifetime data sensing and extraction in energy constrained networked sensor systems. J. Parallel Distrib. Comput. 66(4): 566-577 (2006)
[j83]
[j82]
[j81]Viktor K. Prasanna: Introducting the New Editor-in-Chief of the IEEE Transactions on Computers. IEEE Trans. Computers 55(12): 1489-1490 (2006)
[j80]Zachary K. Baker, Viktor K. Prasanna: Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs. IEEE Trans. Dependable Sec. Comput. 3(4): 289-300 (2006)
[j79]Jingzhao Ou, Viktor K. Prasanna: Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms. ACM Trans. Embedded Comput. Syst. 5(2): 355-382 (2006)
[j78]Yang Yu, Viktor K. Prasanna, Bhaskar Krishnamachari: Energy Minimization for Real-Time Data Gathering in Wireless Sensor Networks. IEEE Transactions on Wireless Communications 5(11): 3087-3096 (2006)
[c168]Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson: An FPGA-Based Application-Specific Processor for Efficient Reduction of Multiple Variable-Length Floating-Point Data Sets. ASAP 2006: 323-330
[c167]Jeoong Sung Park, Hong-Jip Jung, Viktor K. Prasanna: Efficient FPGA-based Implementations of the MIMO-OFDM Physical Layer. ERSA 2006: 153-163
[c166]Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson: A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer. FCCM 2006: 3-12
[c165]Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor K. Prasanna: Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers. FCCM 2006: 23-34
[c164]Zachary K. Baker, Viktor K. Prasanna: An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems. FCCM 2006: 67-75
[c163]Ronald Scrofano, Viktor K. Prasanna: A Performance model for accelerating scientific applications on reconfigurable computers. FPGA 2006: 234
[c162]Zachary K. Baker, Viktor K. Prasanna, Hong-Jip Jung: Regular Expression Software Deceleration for Intrusion Detection Systems. FPL 2006: 1-8
[c161]
[c160]Ling Zhuo, Viktor K. Prasanna: Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. ICPADS (1) 2006: 87-95
[c159]Vasanth Krishna Namasivayam, Viktor K. Prasanna: Scalable Parallel Implementation of Exact Inference in Bayesian Networks. ICPADS (1) 2006: 143-150
[c158]Mitali Singh, Viktor K. Prasanna: Energy-Efficient and Fault-Tolerant Resolution of Topographic Queries in Networked Sensor Systems. ICPADS (1) 2006: 271-280
[c157]Ramakrishna Soma, Amol Bakshi, Viktor K. Prasanna, Will Da Sie: A Model-Based Framework for Developing and Deploying Data Aggregation Services. ICSOC 2006: 227-239
[c156]Animesh Pathak, Viktor K. Prasanna: Issues in designing a compilation framework for macroprogrammed networked sensor systems. InterSense 2006: 7
[c155]Hong-Jip Jung, Zachary K. Baker, Viktor K. Prasanna: Performance of FPGA implementation of bit-split architecture for intrusion detection systems. IPDPS 2006
[c154]Kwatra Kwatra, Viktor K. Prasanna, Mitali Singh: Accelerating DTI tractography using FPGAs. IPDPS 2006
[c153]Cong Zhang, Amol Bakshi, Viktor K. Prasanna, Will Da Sie: Towards a model-based application integration framework for smart oilfields. IRI 2006: 545-550
[c152]Vasanth Krishna Namasivayam, Animesh Pathak, Viktor K. Prasanna: Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference. SBAC-PAD 2006: 167-176
[c151]Ronald Scrofano, Viktor K. Prasanna: Molecular dynamics - Preliminary investigation of advanced electrostatics in molecular dynamics on reconfigurable computers. SC 2006: 90
[e11]Yves Robert, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna (Eds.): High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings. Lecture Notes in Computer Science 4297, Springer 2006, ISBN 3-540-68039-X- 2005
[j77]
[j76]Jingzhao Ou, Seonil B. Choi, Viktor K. Prasanna: Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs. IJES 1(1/2): 91-102 (2005)
[j75]Jingzhao Ou, Viktor K. Prasanna: Arithmetic-Level Instruction Based Energy Estimation for FPGA based Soft Processors. J. Low Power Electronics 1(2): 161-171 (2005)
[j74]Sethavidh Gertphol, Viktor K. Prasanna: MIP formulation for robust resource allocation in dynamic real-time systems. Journal of Systems and Software 77(1): 55-65 (2005)
[j73]
[j72]Yang Yu, Bo Hong, Viktor K. Prasanna: On communication models for algorithm design in networked sensor systems: A case study, . Pervasive and Mobile Computing 1(1): 95-121 (2005)
[j71]
[j70]
[j69]Viktor K. Prasanna: Energy-Efficient Computations on FPGAs. The Journal of Supercomputing 32(2): 139-162 (2005)
[j68]Zachary K. Baker, Viktor K. Prasanna: A computationally efficient engine for flexible intrusion detection. IEEE Trans. VLSI Syst. 13(10): 1179-1189 (2005)
[j67]Ju-wook Jang, Seonil B. Choi, Viktor K. Prasanna: Energy- and time-efficient matrix multiplication on FPGAs. IEEE Trans. VLSI Syst. 13(11): 1305-1319 (2005)
[j66]Andreas Dandalis, Viktor K. Prasanna: Configuration compression for FPGA-based embedded systems. IEEE Trans. VLSI Syst. 13(12): 1394-1398 (2005)
[c150]Zachary K. Baker, Viktor K. Prasanna: High-throughput linked-pattern matching for intrusion detection systems. ANCS 2005: 193-202
[c149]Amol Bakshi, Animesh Pathak, Viktor K. Prasanna: System-level Support for Macroprogramming of Networked Sensing Applications. PSC 2005: 3-11
[c148]
[c147]Jingzhao Ou, Viktor K. Prasanna: Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs. ERSA 2005: 55-61
[c146]Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna: Area-Efficient Evaluation of a Class of Arithmetic Expressions Using Deeply Pipelined Floating-Point Cores. ERSA 2005: 119-128
[c145]Ronald Scrofano, Gokul Govindu, Viktor K. Prasanna: A Library of Parameterizable Floating-Point Cores for FPGAs and Their Application to Scientific Computing. ERSA 2005: 137-148
[c144]Zachary K. Baker, Viktor K. Prasanna: Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs. FCCM 2005: 3-12
[c143]Jingzhao Ou, Viktor K. Prasanna: COMA: A COoperative MAnagement Scheme for Energy Efficient Implementation of Real-Time Operating Systems on FPGA Based Soft Processors. FCCM 2005: 139-148
[c142]Gerald R. Morris, Ling Zhuo, Viktor K. Prasanna: High-Performance FPGA-Based General Reduction Methods. FCCM 2005: 323-324
[c141]
[c140]
[c139]Jingzhao Ou, Viktor K. Prasanna: MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors. IPDPS 2005
[c138]Yang Yu, Viktor K. Prasanna, Bo Hong: Communication Models for Algorithm Design in Networked Sensor Systems. IPDPS 2005
[c137]Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna: Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores. IPDPS 2005
[c136]Cong Zhang, Viktor K. Prasanna, Abdollah Orangi, Will Da Sie, Aditya Kwatra: Modeling methodology for application development in petroleum industry. IRI 2005: 445-451
[c135]Gerald R. Morris, Viktor K. Prasanna: An FPGA-Based Floating-Point Jacobi Iterative Solver. ISPAN 2005: 420-427
[c134]Amol Bakshi, Viktor K. Prasanna: Programming Paradigms for Networked Sensing: A Distributed Systems' Perspective. IWDC 2005: 451-462
[c133]Mitali Singh, Viktor K. Prasanna: Supporting Topographic Queries in a Class of Networked Sensor Systems. PerCom Workshops 2005: 362-368
[c132]Ling Zhuo, Viktor K. Prasanna: High-Performance and Area-Efficient Reduction Circuits on FPGAs. SBAC-PAD 2005: 52-59
[c131]
[e10]Viktor K. Prasanna, S. Sitharama Iyengar, Paul G. Spirakis, Matt Welsh (Eds.): Distributed Computing in Sensor Systems, First IEEE International Conference, DCOSS 2005, Marina del Rey, CA, USA, June 30 - July 1, 2005, Proceedings. Lecture Notes in Computer Science 3560, Springer 2005, ISBN 3-540-26422-1
[e9]David A. Bader, Manish Parashar, Sridhar Varadarajan, Viktor K. Prasanna (Eds.): High Performance Computing - HiPC 2005, 12th International Conference, Goa, India, December 18-21, 2005, Proceedings. Lecture Notes in Computer Science 3769, Springer 2005, ISBN 3-540-30936-5- 2004
[j65]Mitali Singh, Viktor K. Prasanna: A Hierarchical Model For Distributed Collaborative Computation In Wireless Sensor Networks. Int. J. Found. Comput. Sci. 15(3): 485-506 (2004)
[j64]Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna: Issues in Designing Middleware for Wireless Sensor Networks. IEEE Network 18(1): 15-21 (2004)
[j63]Andreas Dandalis, Viktor K. Prasanna: An adaptive cryptographic engine for internet protocol security architectures. ACM Trans. Design Autom. Electr. Syst. 9(3): 333-353 (2004)
[j62]Joon-Sang Park, Michael Penner, Viktor K. Prasanna: Optimizing Graph Algorithms for Improved Cache Performance. IEEE Trans. Parallel Distrib. Syst. 15(9): 769-782 (2004)
[j61]Neungsoo Park, Viktor K. Prasanna: Dynamic data layouts for cache-conscious implementation of a class of signal transforms. IEEE Transactions on Signal Processing 52(7): 2120-2134 (2004)
[c130]Viktor K. Prasanna: Algorithm Design and Optimization for Sensor Systems: (Invited Talk). ALGOSENSORS 2004: 1-2
[c129]Bo Hong, Viktor K. Prasanna: Constrained Flow Optimization with Applications to Data Gathering in Sensor Networks. ALGOSENSORS 2004: 187-200
[c128]Bo Hong, Viktor K. Prasanna: Performance Optimization of a De-centralized Task Allocation Protocol via Bandwidth and Buffer Management. CLADE 2004: 108
[c127]
[c126]Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar: Efficient Floating-point Based Block LU Decomposition on FPGAs. ERSA 2004: 276-279
[c125]Jingzhao Ou, Viktor K. Prasanna: A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs. ERSA 2004: 280-283
[c124]Ronald Scrofano, Viktor K. Prasanna: Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware. ERSA 2004: 284-292
[c123]
[c122]Amol Bakshi, Viktor K. Prasanna: Structured Communication in Single Hop Sensor Networks. EWSN 2004: 138-153
[c121]Jingzhao Ou, Viktor K. Prasanna: PyGen: A MATLAB/Simulink Based Tool for Synthesizing Parameterized and Energy Efficient Designs Using FPGAs. FCCM 2004: 47-56
[c120]Zachary K. Baker, Viktor K. Prasanna: A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs. FCCM 2004: 135-144
[c119]Sumit Mohanty, Viktor K. Prasanna: Duty Cycle Aware Application Design using FPGAs. FCCM 2004: 338-339
[c118]Zachary K. Baker, Viktor K. Prasanna: Time and area efficient pattern matching on FPGAs. FPGA 2004: 223-232
[c117]Zachary K. Baker, Viktor K. Prasanna: Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs. FPL 2004: 311-321
[c116]Sumit Mohanty, Viktor K. Prasanna: A Framework for Energy Efficient Design of Multi-rate Applications Using Hybrid Reconfigurable Systems. FPL 2004: 658-668
[c115]Jingzhao Ou, Viktor K. Prasanna: A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms. FPL 2004: 729-739
[c114]Amol Bakshi, Viktor K. Prasanna: Energy-Efficient Communication in Multi-Channel Single-Hop Sensor Networks. ICPADS 2004: 403-410
[c113]Amol Bakshi, Viktor K. Prasanna: Algorithm Design and Synthesis for Wireless Sensor Networks. ICPP 2004: 423-430
[c112]Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna: Energy-Latency Tradeoffs for Data Gathering in Wireless Sensor Networks. INFOCOM 2004
[c111]Sethavidh Gertphol, Viktor K. Prasanna: Iterative Integer Programming Formuation for Robust Resource Allocation in Dynamic Real-Time Systems. IPDPS 2004
[c110]Gokul Govindu, Seonil Choi, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar: A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs. IPDPS 2004
[c109]Gokul Govindu, Ling Zhuo, Seonil Choi, Viktor K. Prasanna: Analysis of High-Performance Floating-Point Arithmetic on FPGAs. IPDPS 2004
[c108]Bo Hong, Viktor K. Prasanna: Distributed Adaptive Task Allocation in Heterogeneous Computing Environments to Maximize Throughput. IPDPS 2004
[c107]Ling Zhuo, Viktor K. Prasanna: Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on FPGAs. IPDPS 2004
[c106]Jingzhao Ou, Viktor K. Prasanna: Rapid energy estimation of computations on FPGA based soft processors. SoCC 2004: 285-288
[e8]Luc Bougé, Viktor K. Prasanna (Eds.): High Performance Computing - HiPC 2004, 11th International Conference, Bangalore, India, December 19-22, 2004, Proceedings. Lecture Notes in Computer Science 3296, Springer 2004, ISBN 3-540-24129-9- 2003
[j60]Yang Yu, Viktor K. Prasanna: Resource Allocation for Independent Real-Time Tasks in Heterogeneous Systems for Energy Minimization. J. Inf. Sci. Eng. 19(3): 433-449 (2003)
[j59]Prashanth B. Bhat, Cauligi S. Raghavendra, Viktor K. Prasanna: Efficient collective communication in distributed heterogeneous systems. J. Parallel Distrib. Comput. 63(3): 251-263 (2003)
[j58]
[j57]
[j56]
[j55]
[j54]Seonil Choi, Ju-wook Jang, Sumit Mohanty, Viktor K. Prasanna: Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures. The Journal of Supercomputing 26(3): 259-281 (2003)
[j53]Neungsoo Park, Bo Hong, Viktor K. Prasanna: Tiling, Block Data Layout, and Memory Hierarchy Performance. IEEE Trans. Parallel Distrib. Syst. 14(7): 640-654 (2003)
[c105]Sumit Mohanty, Viktor K. Prasanna: A hierarchical approach for energy efficient application design using heterogeneous embedded systems. CASES 2003: 243-254
[c104]Ronald Scrofano, Ju-wook Jang, Viktor K. Prasanna: Energy-Efficient Discrete Cosine Transform on FPGAs. Engineering of Reconfigurable Systems and Algorithms 2003: 215-221
[c103]Jingzhao Ou, Seonil Choi, Viktor K. Prasanna: Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications. FCCM 2003: 241-250
[c102]Sumit Mohanty, Jingzhao Ou, Viktor K. Prasanna: An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs. FCCM 2003: 290-291
[c101]Seonil Choi, Ronald Scrofano, Viktor K. Prasanna, Ju-wook Jang: Energy-efficient signal processing using FPGAs. FPGA 2003: 225-234
[c100]Sumit Mohanty, Viktor K. Prasanna: An Algorithm Designer's Workbench for Platform FPGA's. FPL 2003: 41-50
[c99]Seonil Choi, Viktor K. Prasanna: Time and Energy Efficient Matrix Factorization Using FPGAs. FPL 2003: 507-519
[c98]Yang Yu, Viktor K. Prasanna: Energy-balanced multi-hop packet transmission in wireless sensor networks. GLOBECOM 2003: 480-486
[c97]Caimu Tang, Cauligi S. Raghavendra, Viktor K. Prasanna: An energy efficient adaptive distributed source coding scheme in wireless sensor networks. ICC 2003: 732-737
[c96]
[c95]Mitali Singh, Viktor K. Prasanna, José D. P. Rolim, Cauligi S. Raghavendra: Collaborative and Distributed Computation in Mesh-Like Wireless Sensor Arrays. PWC 2003: 1-11
[c94]Sethavidh Gertphol, Viktor K. Prasanna: MIP Formulation for Robust Resource Allocation in Dynamic Real-Time Systems. IPDPS 2003: 117
[c93]Mitali Singh, Viktor K. Prasanna: A Hierarchical Model for Distributed Collaborative Computation in Wireless Sensor Networks. IPDPS 2003: 166
[c92]Akis Spyropoulos, Cauligi S. Raghavendra, Viktor K. Prasanna: A Distributed Algorithm for Waking-up in Heterogeneous Sensor Networks. IPSN 2003: 609-624
[c91]Yang Yu, Viktor K. Prasanna: Energy-balanced task allocation for collaborative processing in networked embedded systems. LCTES 2003: 265-274
[c90]Mitali Singh, Viktor K. Prasanna: Energy-Optimal and Energy-Balanced Sorting in a Single-Hop Wireless Sensor Network. PerCom 2003: 50-59
[c89]Claude Tadonki, Mitali Singh, José D. P. Rolim, Viktor K. Prasanna: Combinatorial Techniques for Memory Power State Scheduling in Energy-Constrained Systems. WAOA 2003: 265-268
[c88]Mitali Singh, Viktor K. Prasanna: Algorithmic Techniques for Memory Energy Reduction. WEA 2003: 237-252
[e7]Timothy Mark Pinkston, Viktor K. Prasanna (Eds.): High Performance Computing - HiPC 2003, 10th International Conference, Hyderabad, India, December 17-20, 2003, Proceedings. Lecture Notes in Computer Science 2913, Springer 2003, ISBN 3-540-20626-4- 2002
[j52]Wenheng Liu, Cho-Li Wang, Viktor K. Prasanna: Portable and Scalable Algorithm for Irregular All-to-All Communication. J. Parallel Distrib. Comput. 62(10): 1493-1526 (2002)
[j51]Shoukat Ali, Jong-Kook Kim, Yang Yu, Shriram B. Gundala, Sethavidh Gertphol, Howard Jay Siegel, Anthony A. Maciejewski, Viktor K. Prasanna: Utilization-Based Techniques for Statically Mapping Heterogeneous Applications onto the HiPer-D Heterogeneous Computing System. Scalable Computing: Practice and Experience 5(4) (2002)
[j50]Jinwoo Suh, Viktor K. Prasanna: An Efficient Algorithm for Out-of-Core Matrix Transposition. IEEE Trans. Computers 51(4): 420-438 (2002)
[j49]Andreas Dandalis, Viktor K. Prasanna: Run-time performance optimization of an FPGA-based deduction engine for SAT solvers. ACM Trans. Design Autom. Electr. Syst. 7(4): 547-562 (2002)
[c87]Sumit Mohanty, Seonil Choi, Ju-wook Jang, Viktor K. Prasanna: A Model-Based Methodology for Application Specific Energy Efficient Data Path Design Using FPGAs. ASAP 2002: 76-87
[c86]Amol Bakshi, Jingzhao Ou, Viktor K. Prasanna: Towards automatic synthesis of a class of application-specific sensor networks. CASES 2002: 50-58
[c85]Zachary K. Baker, Viktor K. Prasanna: Performance Modeling and Interpretive Simulation of PIM Architectures and Applications (Research Note). Euro-Par 2002: 157-161
[c84]Ju-wook Jang, Seonil Choi, Viktor K. Prasanna: Energy-Efficient Matrix Multiplication on FPGAs. FPL 2002: 534-544
[c83]Reetinder P. S. Sidhu, Viktor K. Prasanna: Efficient Metacomputation Using Self-Reconfiguration. FPL 2002: 698-709
[c82]Ju-wook Jang, Seonil Choi, Viktor K. Prasanna: Area and time efficient implementations of matrix multiplication on FPGAs. FPT 2002: 93-100
[c81]Ronald Scrofano, Seonil Choi, Viktor K. Prasanna: Energy efficiency of FPGAs and programmable processors for matrix multiplication. FPT 2002: 422-425
[c80]Bo Hong, Viktor K. Prasanna: Adaptive Matrix Multiplication in Heterogeneous Environments. ICPADS 2002: 129-
[c79]Yang Yu, Viktor K. Prasanna: Power-Aware Resource Allocation for Independent Tasks in Heterogeneous Real-Time Systems. ICPADS 2002: 341-348
[c78]Neungsoo Park, Bo Hong, Viktor K. Prasanna: Analysis of Memory Hierarchy Performance of Block Data Layout. ICPP 2002: 35-
[c77]Shoukat Ali, Jong-Kook Kim, Yang Yu, Shriram B. Gundala, Sethavidh Gertphol, Howard Jay Siegel, Anthony A. Maciejewski, Viktor K. Prasanna: Utilization-Based Heuristics for Statically Mapping Real-Time Applications onto the HiPer-D Heterogeneous Computing System. IPDPS 2002
[c76]Sethavidh Gertphol, Yang Yu, Shriram B. Gundala, Viktor K. Prasanna, Shoukat Ali, Jong-Kook Kim, Anthony A. Maciejewski, Howard Jay Siegel: A Metric and Mixed-Integer-Programming-Based Approach for Resource Allocation in Dynamic Real-Time Systems. IPDPS 2002
[c75]Joon-Sang Park, Michael Penner, Viktor K. Prasanna: Optimizing Graph Algorithms for Improved Cache Performance. IPDPS 2002
[c74]Caimu Tang, Cauligi S. Raghavendra, Viktor K. Prasanna: Energy Efficient Adaptation of Multicast Protocols in Power Controlled Wireless Ad Hoc Networks. ISPAN 2002: 91-
[c73]Sumit Mohanty, Viktor K. Prasanna, Sandeep Neema, James R. Davis: Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulation. LCTES-SCOPES 2002: 18-27
[c72]Shoukat Ali, Jong-Kook Kim, Howard Jay Siegel, Anthony A. Maciejewski, Yang Yu, Shriram B. Gundala, Sethavidh Gertphol, Viktor K. Prasanna: Greedy Heuristics for Resource Allocation in Dynamic Distributed Real-Time Heterogeneous Computing Systems. PDPTA 2002: 519-530
[e6]Sartaj Sahni, Viktor K. Prasanna, Uday Shukla (Eds.): High Performance Computing - HiPC 2002, 9th International Conference, Bangalore, India, December 18-21, 2002, Proceedings. Lecture Notes in Computer Science 2552, Springer 2002, ISBN 3-540-00303-7- 2001
[j48]Myungho Lee, Wenheng Liu, Viktor K. Prasanna: Parallel Implementation of a Class of Adaptive Signal Processing Applications. Algorithmica 30(4): 645-684 (2001)
[c71]Michael Penner, Viktor K. Prasanna: Cache-Friendly Implementations of Transitive Closure. IEEE PACT 2001: 185-196
[c70]Reetinder P. S. Sidhu, Viktor K. Prasanna: Fast Regular Expression Matching Using FPGAs. FCCM 2001: 227-238
[c69]Andreas Dandalis, Viktor K. Prasanna: Configuration compression for FPGA-based embedded systems. FPGA 2001: 173-182
[c68]Andreas Dandalis, Viktor K. Prasanna, Bharani Thiruvengadam: Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers. FPL 2001: 315-325
[c67]Jong-Kook Kim, Taylor Kidd, Howard Jay Siegel, Cynthia E. Irvine, Timothy E. Levin, Debra A. Hensgen, David St. John, Viktor K. Prasanna, Richard F. Freund, N. Wayne Porter: Collective Value of QoS: A Performance Measure Framework for Distributed Heterogeneous Networks. IPDPS 2001: 84
[c66]Ammar H. Alhusaini, Cauligi S. Raghavendra, Viktor K. Prasanna: Run-Time Adaptation for Grid Environments. IPDPS 2001: 87
[c65]Sethavidh Gertphol, Yang Yu, Ammar H. Alhusaini, Viktor K. Prasanna: An integer programming approach for static mapping onto heterogeneous real-time systems. IPDPS 2001: 95
[c64]Amol Bakshi, Viktor K. Prasanna, Ákos Lédeczi: MILAN: A Model Based Integrated Simulation Framework for Desgin of Embedded Suystems. LCTES/OM 2001: 82-87
[e5]Burkhard Monien, Viktor K. Prasanna, Sriram Vajapeyam (Eds.): High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings. Lecture Notes in Computer Science 2228, Springer 2001, ISBN 3-540-43009-1- 2000
[j47]Prashanth B. Bhat, Viktor K. Prasanna, Cauligi S. Raghavendra: Block-cyclic redistribution over heterogeneous networks. Cluster Computing 3(1): 25-34 (2000)
[c63]Andreas Dandalis, Viktor K. Prasanna, José D. P. Rolim: A Comparative Study of Performance of AES Final Candidates Using FPGAs. CHES 2000: 125-140
[c62]Andreas Dandalis, Viktor K. Prasanna, José D. P. Rolim: An Adaptive Cryptographic Engine for IPSec Architectures. FCCM 2000: 132-144
[c61]Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro Mei, Viktor K. Prasanna: A Self-Reconfigurable Gate Array Architecture. FPL 2000: 106-120
[c60]Ammar H. Alhusaini, Viktor K. Prasanna, Cauligi S. Raghavendra: A Framework for Mapping with Resource Co-Allocation in Heterogeneous Computing Systems. Heterogeneous Computing Workshop 2000: 273-286
[c59]Jinwoo Suh, Viktor K. Prasanna: An Efficient Algorithm for Large-Scale Matrix Transposition. ICPP 2000: 327-334
[c58]Yongwha Chung, K. Park, W. Hahn, Neungsoo Park, Viktor K. Prasanna: Performance of On-Chip Multiprocessors for Vision Tasks. IPDPS Workshops 2000: 242-249
[c57]Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Viktor K. Prasanna: Dynamic Data Layouts for Cache-Conscious Factorization of DFT. IPDPS 2000: 693-702
[c56]Hossam A. ElGindy, Viktor K. Prasanna, Hartmut Schmeck, Oliver Diessel: Configurable Architectures Workshop (RAW 2000). IPDPS Workshops 2000: 870-872
[c55]Kiran Bondalapati, Viktor K. Prasanna: Loop Pipelining and Optimization for Run Time Reconfiguration. IPDPS Workshops 2000: 906-915
[c54]Viktor K. Prasanna, Cauligi S. Raghavendra: Heterogeneous Computing Workshop (HCW 2000). IPDPS Workshops 2000: 1301-1306
[c53]Jong-Kook Kim, Debra A. Hensgen, Taylor Kidd, Howard Jay Siegel, David St. John, Cynthia E. Irvine, Timothy E. Levin, N. Wayne Porter, Viktor K. Prasanna, Richard F. Freund: A QoS performance measure framework for distributed heterogeneous networks. PDP 2000: 18-27
[e4]Mateo Valero, Viktor K. Prasanna, Sriram Vajapeyam (Eds.): High Performance Computing - HiPC 2000, 7th International Conference, Bangalore, India, December 17-20, 2000, Proceedings. Lecture Notes in Computer Science 1970, Springer 2000, ISBN 3-540-41429-0
1990 – 1999
- 1999
[j46]Young Won Lim, Prashanth B. Bhat, Viktor K. Prasanna: Efficient Algorithms for Block-Cyclic Redistribution of Arrays. Algorithmica 24(3-4): 298-330 (1999)
[j45]Prashanth B. Bhat, Viktor K. Prasanna, Cauligi S. Raghavendra: Adaptive Communication Algorithms for Distributed Heterogeneous Systems. J. Parallel Distrib. Comput. 59(2): 252-279 (1999)
[j44]Neungsoo Park, Viktor K. Prasanna, Cauligi S. Raghavendra: Efficient Algorithms for Block-Cyclic Array Redistribution Between Processor Sets. IEEE Trans. Parallel Distrib. Syst. 10(12): 1217-1240 (1999)
[c52]Kiran Bondalapati, Viktor K. Prasanna: Dynamic Precision Management for Loop Computations on Reconfigurable Architectures. FCCM 1999: 249-
[c51]Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna: String Natching on Nulticontext FPGAs Using Self-Reconfiguration. FPGA 1999: 217-226
[c50]Kiran Bondalapati, Viktor K. Prasanna: DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems. FPL 1999: 31-40
[c49]Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna: Genetic Programming Using Self-Reconfigurable FPGAs. FPL 1999: 301-312
[c48]Ammar H. Alhusaini, Viktor K. Prasanna, Cauligi S. Raghavendra: A Unified Resource Scheduling Framework for Heterogeneous Computing Environments. Heterogeneous Computing Workshop 1999: 156-
[c47]

