| 2012 | ||
|---|---|---|
| j8 | Sewan Heo, Yil Suk Yang, Sang-Kyun Lee, Jong-Kee Kwon: Adaptive Energy Management System Based on Low-Power Microcontroller with Energy harvesting at Maximum Power. Journal of Circuits, Systems, and Computers 21(8) (2012) | |
| j7 | Young-Deuk Jeon, Jae-Won Nam, Kwi-Dong Kim, Tae Moon Roh, Jong-Kee Kwon: A Dual-Channel Pipelined ADC With Sub-ADC Based on Flash-SAR Architecture. IEEE Trans. on Circuits and Systems 59-II(11): 741-745 (2012) | |
| 2011 | ||
| j6 | Sang-Hun Yoon, Daegun Oh, Jong-Wha Chong, Tae Moon Roh, Jong-Kee Kwon, Jongdae Kim: A Novel Timing Estimation Method for Chirp-Based Systems. IEICE Transactions 94-B(12): 3607-3609 (2011) | |
| j5 | Sang-Hyun Cho, Chang-Kyo Lee, Jong-Kee Kwon, Seung-Tak Ryu: A 550- μħbox W 10-b 40-MS/s SAR ADC With Multistep Addition-Only Digital Error Correction. J. Solid-State Circuits 46(8): 1881-1892 (2011) | |
| j4 | Jae-Won Nam, Young-Deuk Jeon, Young-Kyun Cho, Jong-Kee Kwon: A 12-bit 200-MS/s pipelined A/D converter with sampling skew reduction technique. Microelectronics Journal 42(11): 1225-1230 (2011) | |
| j3 | Young-Kyun Cho, Young-Deuk Jeon, Jae-Won Nam, Jong-Kee Kwon: A 10-bit 30-MS/s successive approximation register analog-to-digital converter for low-power sub-sampling applications. Microelectronics Journal 42(12): 1335-1342 (2011) | |
| 2010 | ||
| j2 | Young-Kyun Cho, Young-Deuk Jeon, Jae-Won Nam, Jong-Kee Kwon: A 9-bit 80 MS/s Successive Approximation Register Analog-to-Digital Converter With a Capacitor Reduction Technique. IEEE Trans. on Circuits and Systems 57-II(7): 502-506 (2010) | |
| c3 | Sang-Hyun Cho, Chang-Kyo Lee, Jong-Kee Kwon, Seung-Tak Ryu: A 550µW 10b 40MS/s SAR ADC with multistep addition-only digital error correction. CICC 2010: 1-4 | |
| c2 | Young-Deuk Jeon, Young-Kyun Cho, Jae-Won Nam, Kwi-Dong Kim, Woo-Yol Lee, Kuk-Tae Hong, Jong-Kee Kwon: A 9.15mW 0.22mm2 10b 204MS/s pipelined SAR ADC in 65nm CMOS. CICC 2010: 1-4 | |
| c1 | Chul Kim, Chang-Seok Chae, Young-sub Yuk, Yi-Gyeong Kim, Jong-Kee Kwon, Gyu-Hyeong Cho: A 105dB-gain 500MHz-bandwidth 0.1Ω-output-impedance amplifier for an amplitude modulator in 65nm CMOS. ISSCC 2010: 88-89 | |
| 2009 | ||
| j1 | Hyungdong Roh, Hyoungjoong Kim, Youngkil Choi, Jeongjin Roh, Yi-Gyeong Kim, Jong-Kee Kwon: A 0.6-V Delta-Sigma Modulator With Subthreshold-Leakage Suppression Switches. IEEE Trans. on Circuits and Systems 56-II(11): 825-829 (2009) | |
Colors in the list of coauthors
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