Boppana Lakshmi

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	2013
j3		Boppana Lakshmi, A. S. Dhar: VLSI architecture for parallel radix-4 CORDIC. Microprocessors and Microsystems - Embedded Hardware Design 37(1): 79-86 (2013)
	2011
j2		Boppana Lakshmi, A. S. Dhar: VLSI architecture for low latency radix-4 CORDIC. Computers & Electrical Engineering 37(6): 1032-1042 (2011)
	2010
j1		Boppana Lakshmi, A. S. Dhar: CORDIC Architectures: A Survey. VLSI Design 2010 (2010)

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