William K. C. Lam

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	1996
j2		William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Valid clock frequencies and their computation in wavepipelined circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 15(7): 791-807 (1996)
	1995
j1		William K. C. Lam, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Delay fault coverage, test set size, and performance trade-offs. IEEE Trans. on CAD of Integrated Circuits and Systems 14(1): 32-44 (1995)
	1994
c7		William K. C. Lam, Robert K. Brayton: Criteria for the Simple Path Property in Timed Automata. CAV 1994: 27-40
c6		William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Exact Minimum Cycle Times for Finite State Machines. DAC 1994: 100-105
	1993
c5		William K. C. Lam, Robert K. Brayton: Alternating RQ Timed Automata. CAV 1993: 237-252
c4		William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Circuit Delay Models and Their Exact Computation Using Timed Boolean Functions. DAC 1993: 128-134
c3		William K. C. Lam, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Delay Fault Coverage and Performance Tradeoffs. DAC 1993: 446-452
	1992
c2		William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Valid clocking in wavepipelined circuits. ICCAD 1992: 518-525
c1		William K. C. Lam, Robert K. Brayton: On Relationship Between ITE and BDD. ICCD 1992: 448-451

Coauthor Index

1	Robert K. Brayton	[j2] [j1] [c7] [c6] [c5] [c4] [c3] [c2] [c1]
2	Alexander Saldanha	[j1] [c3]
3	Alberto L. Sangiovanni-Vincentelli	[j2] [j1] [c6] [c4] [c3] [c2]

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