| 2009 | ||
|---|---|---|
| c13 | Darshan Desai, Gerolf Hoflehner, Arun Kejariwal, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum, Cameron McNairy: Performance Characterization of Itanium® 2-Based Montecito Processor. SPEC Benchmark Workshop 2009: 36-56 | |
| 2007 | ||
| c12 | Arun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum: Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. SIGMETRICS 2007: 361-362 | |
| 2004 | ||
| c11 | Gerolf Hoflehner, Knud Kirkegaard, Rod Skinner, Daniel M. Lavery, Yong-Fong Lee, Wei Li: Compiler Optimizations for Transaction Processing Workloads on Itanium® Linux Systems. MICRO 2004: 294-303 | |
| 2003 | ||
| j4 | Gerolf Hoflehner, Daniel M. Lavery, David C. Sehr: The compiler as a validation and evaluation tool. Electr. Notes Theor. Comput. Sci. 82(2): 443-460 (2003) | |
| c10 | Jean-Francois Collard, Daniel M. Lavery: Optimizations to Prevent Cache Penalties for the Intel ® Itanium 2 Processor. CGO 2003: 105-114 | |
| c9 | Alex Settle, Daniel A. Connors, Gerolf Hoflehner, Daniel M. Lavery: Optimization for the Intel® Itanium ®Architectur Register Stack. CGO 2003: 115-124 | |
| 2002 | ||
| c8 | R. David Weldon, Steven S. Chang, Hong Wang, Gerolf Hoflehner, Perry H. Wang, Daniel M. Lavery, John Paul Shen: Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors. Interaction between Compilers and Computer Architectures 2002: 57-67 | |
| c7 | Shih-Wei Liao, Perry H. Wang, Hong Wang, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery: Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. PLDI 2002: 117-128 | |
| 2001 | ||
| c6 | Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen: Speculative precomputation: long-range prefetching of delinquent loads. ISCA 2001: 14-25 | |
| c5 | Rakesh Ghiya, Daniel M. Lavery, David C. Sehr: On the Importance of Points-to Analysis and Other Memory Disambiguation Methods for C Programs. PLDI 2001: 47-58 | |
| 2000 | ||
| j3 | Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M. Lavery, Wei Li, Chu-Cheow Lim, John Ng, David C. Sehr: An Advanced Optimizer for the IA-64 Architecture. IEEE Micro 20(6): 60-68 (2000) | |
| 1996 | ||
| c4 | Daniel M. Lavery, Wen-mei W. Hwu: Modulo Scheduling of Loops in Control-intensive Non-numeric Programs. MICRO 1996: 126-137 | |
| 1995 | ||
| j2 | Pohua P. Chang, Daniel M. Lavery, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu: The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors. IEEE Trans. Computers 44(3): 353-370 (1995) | |
| c3 | Daniel M. Lavery, Wen-mei W. Hwu: Unrolling-based optimizations for modulo scheduling. MICRO 1995: 327-337 | |
| 1993 | ||
| j1 | Wen-mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, Daniel M. Lavery: The superblock: An effective technique for VLIW and superscalar compilation. The Journal of Supercomputing 7(1-2): 229-248 (1993) | |
| 1992 | ||
| c2 | William Y. Chen, Roger A. Bringmann, Scott A. Mahlke, Sadun Anik, Tokuzo Kiyohara, Nancy J. Warter, Daniel M. Lavery, Wen-mei W. Hwu, Richard E. Hank, John C. Gyllenhaal: Using Profile Information to Assist Advaced Compiler Optimization and Scheduling. LCPC 1992: 31-48 | |
| 1991 | ||
| c1 | Jeff Konicek, Tracy Tilton, Alexander V. Veidenbaum, Chuan-Qi Zhu, Edward S. Davidson, Ruppert A. Downing, Michael J. Haney, Manish Sharma, Pen-Chung Yew, P. Michael Farmwald, David J. Kuck, Daniel M. Lavery, Robert A. Lindsey, D. Pointer, John T. Andrews, Thomas Beck, T. Murphy, Stephen W. Turner, Nancy J. Warter: The Organization of the Cedar System. ICPP (1) 1991: 49-56 | |
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