| 2012 | ||
|---|---|---|
| j30 | Tai-Pao Chuang, Che Wun Chiou, Shun-Shii Lin, Chiou-Yng Lee: Fault-tolerant Gaussian normal basis multiplier over GF(2m). IET Information Security 6(3): 157-170 (2012) | |
| j29 | Che Wun Chiou, Hung Wei Chang, Wen-Yew Liang, Chiou-Yng Lee, Jim-Min Lin, Yun-Chi Yeh: Low-complexity Gaussian normal basis multiplier over GF(2m). IET Information Security 6(4): 310-317 (2012) | |
| j28 | Che Wun Chiou, Tai-Pao Chuang, Shun-Shii Lin, Chiou-Yng Lee, Jim-Min Lin, Yun-Chi Yeh: Palindromic-like representation for Gaussian normal basis multiplier over GF(2m) with odd type t. IET Information Security 6(4): 318-323 (2012) | |
| j27 | Chiou-Yng Lee, Che Wun Chiou: Scalable Gaussian Normal Basis Multipliers over GF(2 m ) Using Hankel Matrix-Vector Representation. Signal Processing Systems 69(2): 197-211 (2012) | |
| c20 | ||
| c19 | Liang-Hwa Chen, Po-Lun Chang, Yen-Ching Chang, Chiou-Yng Lee: A Scalable Architecture for Dual Basis GF(2m) Multiplications. ISBAST 2012: 45-50 | |
| 2011 | ||
| j26 | Chiou-Yng Lee, Chia-Chen Fan, Erl-Huei Lu: Combined circuit architecture for computing normal basis and Montgomery multiplications over GF(2m). IJAACS 4(3): 291-306 (2011) | |
| j25 | Che Wun Chiou, Chiou-Yng Lee, Yun-Chi Yeh: Multiplexer implementation of low-complexity polynomial basis multiplier in GF(m2) using all one polynomial. Inf. Process. Lett. 111(21-22): 1044-1047 (2011) | |
| c18 | Chiou-Yng Lee, Pramod Kumar Meher: Speeding up Subquadratic Finite Field Multiplier over GF(2m) Generated by Trinomials Using Toeplitz Matrix-Vector with Inner Product Formula. ICGEC 2011: 232-236 | |
| c17 | Che Wun Chiou, Jim-Min Lin, Chiou-Yng Lee, Chi-Ting Ma: Novel Mastrovito Multiplier over GF(2m) Using Trinomial. ICGEC 2011: 237-242 | |
| 2010 | ||
| j24 | Chiou-Yng Lee, Pramod Kumar Meher: Efficient bit-parallel multipliers over finite fields GF(2m). Computers & Electrical Engineering 36(5): 955-968 (2010) | |
| j23 | Che Wun Chiou, Wen-Yew Liang, Hung Wei Chang, Jim-Min Lin, Chiou-Yng Lee: Concurrent error detection in semi-systolic dual basis multiplier over GF(2m) using self-checking alternating logic. IET Circuits, Devices & Systems 4(5): 382-391 (2010) | |
| j22 | Chiou-Yng Lee: Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2m). Integration 43(1): 113-123 (2010) | |
| j21 | Chiou-Yng Lee, Pramod Kumar Meher, Jagdish Chandra Patra: Concurrent Error Detection in Bit-Serial Normal Basis Multiplication Over GF(2m) Using Multiple Parity Prediction Schemes. IEEE Trans. VLSI Syst. 18(8): 1234-1238 (2010) | |
| j20 | Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Concurrent Error Detection in Multiplexer-Based Multipliers for Normal Basis of GF(2m) Using Double Parity Prediction Scheme. Signal Processing Systems 58(2): 233-246 (2010) | |
| c16 | Chiou-Yng Lee, Yu-Hsin Chiu, Jung-Hui Chiu: Concurrent Error Detection in Shifted Dual Basis Multiplier over GF(2m) Using Cyclic Code Approach. AINA Workshops 2010: 234-239 | |
| c15 | Chiou-Yng Lee: Concurrent Error Detection in Systolic Array AB^2 Multiplier Using Linear Codes. CASoN 2010: 111-115 | |
| c14 | Che Wun Chiou, Jim-Min Lin, Chiou-Yng Lee: Fast Optimal Normal Basis Multiplier with Type-2kw Over GF (2m). CASoN 2010: 116-120 | |
| c13 | Chiou-Yng Lee: Error-Correcting Codes for Concurrent Error Correction in Bit-Parallel Systolic and Scalable Multipliers for Shifted Dual Basis of GF(2m). ISPA 2010: 405-412 | |
| 2009 | ||
| j19 | Che Wun Chiou, Chiou-Yng Lee, Jim-Min Lin, Ting-Wei Hou, Chin-Chen Chang: Concurrent error detection and correction in dual basis multiplier over GF(2m). IET Circuits, Devices & Systems 3(1): 22-40 (2009) | |
| j18 | Che Wun Chiou, Chiou-Yng Lee, Jim-Min Lin: Unified dual-field multiplier in GF(P) and GF(2k). IET Information Security 3(2): 45-52 (2009) | |
| j17 | Che Wun Chiou, Chin-Chen Chang, Chiou-Yng Lee, Ting-Wei Hou, Jim-Min Lin: Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m). IEEE Trans. Computers 58(6): 851-857 (2009) | |
| c12 | Pramod Kumar Meher, Yajun Ha, Chiou-Yng Lee: An optimized design for serial-parallel finite field multiplication over GF(2m) based on all-one polynomials. ASP-DAC 2009: 210-215 | |
| c11 | Pramod Kumar Meher, Chiou-Yng Lee: Scalable Serial-parallel Multiplier over GF(2m) by Hierarchical Pre-reduction and Input Decomposition. ISCAS 2009: 2910-2913 | |
| c10 | Wen-Yo Lee, Jhu-Syuan Guo, Chiou-Yng Lee, Chan-An Pao, Ta-Chih Hung: Implementation of an interactive mobile robot over mixed reality. ROBIO 2009: 80-85 | |
| 2008 | ||
| j16 | Chiou-Yng Lee: Multiplexer-based bit-parallel systolic multipliers over GF(2m). Computers & Electrical Engineering 34(5): 392-405 (2008) | |
| j15 | Chiou-Yng Lee: Low-Complexity Parallel Systolic Montgomery Multipliers over GF(2m) Using Toeplitz Matrix-Vector Representation. IEICE Transactions 91-A(6): 1470-1477 (2008) | |
| j14 | Chin-Chin Chen, Chiou-Yng Lee, Erl-Huei Lu: Scalable and Systolic Montgomery Multipliers over GF(2m). IEICE Transactions 91-A(7): 1763-1771 (2008) | |
| j13 | Chiou-Yng Lee: Low-complexity bit-parallel systolic multipliers over GF(2m). Integration 41(1): 106-112 (2008) | |
| j12 | Chiou-Yng Lee, Che Wun Chiou: New Bit-Parallel Systolic Architectures for Computing Multiplication, Multiplicative Inversion and Division in GF(2m) Under Polynomial Basis and Normal Basis Representations. Signal Processing Systems 52(3): 313-324 (2008) | |
| c9 | Chiou-Yng Lee: Concurrent Error Detection in Digit-Serial Normal Basis Multiplication over GF(2m). AINA Workshops 2008: 1499-1504 | |
| c8 | Chiou-Yng Lee, Pramod Kumar Meher: Efficient Bit-Parallel Multipliers in Composite Fields. APSCC 2008: 686-691 | |
| c7 | Chin-Chin Chen, Chiou-Yng Lee, Erl-Huei Lu: Combined circuit architecture for computing normal basis and montgomery multiplications over GF(2m). Mobility Conference 2008: 46 | |
| 2007 | ||
| j11 | Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin, Chin-Chen Chang: Scalable and systolic Montgomery multiplier over GF(2m) generated by trinomials. IET Circuits, Devices & Systems 1(6): 477-484 (2007) | |
| j10 | Chiou-Yng Lee, Yung-Hui Chen, Che Wun Chiou, Jim-Min Lin: Unified Parallel Systolic Multiplier Over GF(2m). J. Comput. Sci. Technol. 22(1): 28-38 (2007) | |
| c6 | Chiou-Yng Lee, Yung-Hui Chen: Low-Complexity Parallel Systolic Architectures for Computing Multiplication and Squaring over FG(2m). AINA Workshops (1) 2007: 906-911 | |
| 2006 | ||
| j9 | Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m). J. Electronic Testing 22(2): 143-150 (2006) | |
| j8 | Che Wun Chiou, Chiou-Yng Lee, An-Wen Deng, Jim-Min Lin: Concurrent Error Detection in Montgomery Multiplication over GF(2m). IEICE Transactions 89-A(2): 566-574 (2006) | |
| j7 | Chiou-Yng Lee, Jenn-Shyong Horng, I-Chang Jou: Low-Complexity Bit-Parallel Multiplier over GF(2m) Using Dual Basis Representation. J. Comput. Sci. Technol. 21(6): 887-892 (2006) | |
| c5 | Chiou-Yng Lee, Yu-Hsin Chiu, Che Wun Chiou: New Bit-Parallel Systolic Multiplier over GF(2m) Using The Modified Booth's Algorithm. APCCAS 2006: 610-613 | |
| c4 | Chiou-Yng Lee, Chin-Chin Chen, Yuan-Ho Chen, Erl-Huei Lu: Low-Complexity Bit-Parallel Systolic Multipliers over GF(2m). SMC 2006: 1160-1165 | |
| 2005 | ||
| j6 | Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Low-complexity bit-parallel dual basis multipliers using the modified Booth's algorithm. Computers & Electrical Engineering 31(7): 444-459 (2005) | |
| j5 | Che Wun Chiou, Chiou-Yng Lee: Multiplexer-based double-exponentiation for normal basis of GF(2m). Computers & Security 24(1): 83-86 (2005) | |
| j4 | Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m). J. Electronic Testing 21(5): 539-549 (2005) | |
| j3 | Chiou-Yng Lee, Che Wun Chiou: Efficient Design of Low-Complexity Bit-Parallel Systolic Hankel Multipliers to Implement Multiplication in Normal and Dual Bases of GF (2m). IEICE Transactions 88-A(11): 3169-3179 (2005) | |
| j2 | Chiou-Yng Lee, Jenn-Shyong Horng, I-Chang Jou, Erl-Huei Lu: Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m). IEEE Trans. Computers 54(9): 1061-1070 (2005) | |
| 2004 | ||
| c3 | Chiou-Yng Lee, Chung-Jyi Chang: Low-complexity linear array multiplier for normal basis of type-II. ICME 2004: 1515-1518 | |
| 2002 | ||
| c2 | Chiou-Yng Lee, Ya-Cheng Lu, Erl-Huei Lu: Low-complexity systolic multiplier over GF(2/sup m/) using weakly dual basis. APCCAS (1) 2002: 367-372 | |
| 2001 | ||
| j1 | Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee: Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials. IEEE Trans. Computers 50(5): 385-393 (2001) | |
| c1 | Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee: New bit-parallel systolic multipliers for a class of GF(2m). ISCAS (4) 2001: 578-581 | |
Colors in the list of coauthors
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