| 2013 | ||
|---|---|---|
| j25 | Dong Hyuk Woo, Nak Hee Seong, Hsien-Hsin S. Lee: Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV. IEEE Trans. VLSI Syst. 21(1): 1-13 (2013) | |
| 2012 | ||
| j24 | Sungkap Yeo, Hsien-Hsin S. Lee: SimWare: A Holistic Warehouse-Scale Computer Simulator. IEEE Computer 45(9): 48-55 (2012) | |
| c63 | Mohammad M. Hossain, Jen-Cheng Huang, Hsien-Hsin S. Lee: Migration energy-aware workload consolidation in enterprise clouds. CloudCom 2012: 405-410 | |
| c62 | Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim: 3D-MAPS: 3D Massively parallel processor with stacked memory. ISSCC 2012: 188-190 | |
| 2011 | ||
| j23 | Sungkap Yeo, Hsien-Hsin S. Lee: Using Mathematical Modeling in Provisioning a Heterogeneous Cloud Computing Environment. IEEE Computer 44(8): 55-62 (2011) | |
| j22 | Ahmad Sharif, Hsien-Hsin S. Lee: Data Prefetching by Exploiting Global and Local Access Patterns. J. Instruction-Level Parallelism 13 (2011) | |
| j21 | Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee: Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out. IEEE Micro 31(1): 119-127 (2011) | |
| j20 | Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim: Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 30(5): 732-745 (2011) | |
| j19 | Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim: Integrated microarchitectural floorplanning and run-time controller for inductive noise mitigation. ACM Trans. Design Autom. Electr. Syst. 16(4): 46 (2011) | |
| c61 | Xiaodong Wang, Dilip P. Vasudevan, Hsien-Hsin S. Lee: Global Built-In Self-Repair for 3D memories with redundancy sharing and parallel testing. 3DIC 2011: 1-8 | |
| c60 | Jen-Cheng Huang, Matteo Monchiero, Yoshio Turner, Hsien-Hsin S. Lee: Ally: OS-Transparent Packet Inspection Using Sequestered Cores. ANCS 2011: 1-11 | |
| c59 | Dean L. Lewis, Shreepad Panth, Xin Zhao, Sung Kyu Lim, Hsien-Hsin S. Lee: Designing 3D test wrappers for pre-bond and post-bond test of 3D embedded cores. ICCD 2011: 90-95 | |
| c58 | Mrinmoy Ghosh, Ripal Nathuji, Min Lee, Karsten Schwan, Hsien-Hsin S. Lee: Symbiotic Scheduling for Shared Caches in Multi-core Systems Using Memory Footprint Signature. ICPP 2011: 11-20 | |
| 2010 | ||
| j18 | Sung Woo Chung, Hsien-Hsin S. Lee, Woo Hyong Lee: Architecture/OS Support for Embedded Multi-core Systems. Comput. J. 53(8): 1134-1135 (2010) | |
| j17 | Jun Yang, Lan Gao, Youtao Zhang, Marek Chrobak, Hsien-Hsin S. Lee: A low-cost memory remapping scheme for address bus protection. J. Parallel Distrib. Comput. 70(5): 443-457 (2010) | |
| j16 | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Hsien-Hsin S. Lee: Chameleon: Virtualizing idle acceleration cores of a heterogeneous multicore processor for caching and prefetching. TACO 7(1) (2010) | |
| c57 | Dong Hyuk Woo, Hsien-Hsin S. Lee: COMPASS: a programmable data prefetcher using idle GPU shaders. ASPLOS 2010: 297-310 | |
| c56 | Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim: Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory. CICC 2010: 1-4 | |
| c55 | Dong Hyuk Woo, Nak Hee Seong, Dean L. Lewis, Hsien-Hsin S. Lee: An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth. HPCA 2010: 1-12 | |
| c54 | Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee: Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping. ISCA 2010: 383-394 | |
| c53 | Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee: SAFER: Stuck-At-Fault Error Recovery for Memories. MICRO 2010: 115-124 | |
| 2009 | ||
| j15 | Hsien-Hsin S. Lee, Krishnendu Chakrabarty: Test Challenges for 3D Integrated Circuits. IEEE Design & Test of Computers 26(5): 26-35 (2009) | |
| j14 | Dong Hyuk Woo, Hsien-Hsin S. Lee: PROPHET: goal-oriented provisioning for highly tunable multicore processors in cloud computing. Operating Systems Review 43(2): 102-103 (2009) | |
| c52 | Dean L. Lewis, Hsien-Hsin S. Lee: Architectural evaluation of 3D stacked RRAM caches. 3DIC 2009: 1-4 | |
| c51 | Michael B. Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, Sung Kyu Lim: Thermal optimization in multi-granularity multi-core floorplanning. ASP-DAC 2009: 43-48 | |
| c50 | Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim: Pre-bond testable low-power clock tree design for 3D stacked ICs. ICCAD 2009: 184-190 | |
| c49 | Mrinmoy Ghosh, Emre Özer, Simon Ford, Stuart Biles, Hsien-Hsin S. Lee: Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches. ISLPED 2009: 165-170 | |
| c48 | Dean L. Lewis, Sudhakar Yalamanchili, Hsien-Hsin S. Lee: High Performance Non-blocking Switch Design in 3D Die-Stacking Technology. ISVLSI 2009: 25-30 | |
| c47 | ||
| 2008 | ||
| j13 | Dong Hyuk Woo, Hsien-Hsin S. Lee: Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era. IEEE Computer 41(12): 24-31 (2008) | |
| j12 | Fayez Mohamood, Mrinmoy Ghosh, Hsien-Hsin S. Lee: DLL-conscious instruction fetch optimization for SMT processors. Journal of Systems Architecture - Embedded Systems Design 54(12): 1089-1100 (2008) | |
| j11 | Dong Hyuk Woo, Hsien-Hsin S. Lee, Joshua B. Fryman, Allan D. Knies, Marsha Eng: POD: A 3D-Integrated Broad-Purpose Acceleration Layer. IEEE Micro 28(4): 28-40 (2008) | |
| c46 | Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim: A unified methodology for power supply noise reduction in modern microarchitecture design. ASP-DAC 2008: 611-616 | |
| c45 | Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-Hsin S. Lee: Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors. ASPLOS 2008: 60-69 | |
| c44 | Ahmad Sharif, Hsien-Hsin S. Lee: Total Recall: A Debugging Framework for GPUs. Graphics Hardware 2008: 13-20 | |
| c43 | Vikas R. Vasisht, Hsien-Hsin S. Lee: SHARK: Architectural support for autonomic protection against stealth by rootkit exploits. MICRO 2008: 106-116 | |
| c42 | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee: Improving TLB energy for java applications on JVM. ICSAMOS 2008: 218-223 | |
| c41 | Richard M. Yoo, Hsien-Hsin S. Lee: Adaptive transaction scheduling for transactional memory systems. SPAA 2008: 169-178 | |
| c40 | Richard M. Yoo, Yang Ni, Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai, Hsien-Hsin S. Lee: Kicking the tires of software transactional memory: why the going gets tough. SPAA 2008: 265-274 | |
| 2007 | ||
| j10 | Xiaotong Zhuang, Hsien-Hsin S. Lee: Reducing Cache Pollution via Dynamic Data Prefetch Filtering. IEEE Trans. Computers 56(1): 18-31 (2007) | |
| j9 | Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh: Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 38-52 (2007) | |
| j8 | Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee: Memory-Centric Security Architecture. T. HiPEAC 1: 95-115 (2007) | |
| c39 | Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee: Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling. ASP-DAC 2007: 786-791 | |
| c38 | Weidong Shi, Hsien-Hsin S. Lee: Accelerating memory decryption and authentication with frequent value prediction. Conf. Computing Frontiers 2007: 35-46 | |
| c37 | Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee: An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems. FPL 2007: 47-53 | |
| c36 | Eric Fontaine, Hsien-Hsin S. Lee: Optimizing Katsevich image reconstruction algorithm on multicore processors. ICPADS 2007: 1-8 | |
| c35 | Mrinmoy Ghosh, Hsien-Hsin S. Lee: Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems. ICPADS 2007: 1-8 | |
| c34 | Dean L. Lewis, Hsien-Hsin S. Lee: A scanisland based design enabling prebond testability in die-stacked microprocessors. ITC 2007: 1-8 | |
| c33 | Mrinmoy Ghosh, Hsien-Hsin S. Lee: Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs. MICRO 2007: 134-145 | |
| 2006 | ||
| j7 | Chenghuai Lu, Tao Zhang, Weidong Shi, Hsien-Hsin S. Lee: M-TREE: A high efficiency security architecture for protecting integrity and privacy of software. J. Parallel Distrib. Comput. 66(9): 1116-1128 (2006) | |
| j6 | Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim: Profile-guided microarchitectural floor planning for deep submicron processor design. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1289-1300 (2006) | |
| c32 | Lan Gao, Jun Yang, Marek Chrobak, Youtao Zhang, San Nguyen, Hsien-Hsin S. Lee: A low-cost memory remapping scheme for address bus protection. PACT 2006: 74-83 | |
| c31 | Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee: Efficient System-on-Chip Energy Management with a Segmented Bloom Filter. ARCS 2006: 283-297 | |
| c30 | Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee: Reducing energy of virtual cache synonym lookup using bloom filters. CASES 2006: 179-189 | |
| c29 | Chinnakrishnan S. Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, Hsien-Hsin S. Lee: Entropy-based low power data TLB design. CASES 2006: 304-311 | |
| c28 | Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh: Microarchitectural floorplanning under performance and thermal tradeoff. DATE 2006: 1288-1293 | |
| c27 | Weidong Shi, Joshua B. Fryman, Guofei Gu, Hsien-Hsin S. Lee, Youtao Zhang, Jun Yang: InfoShield: a security architecture for protecting information usage in memory. HPCA 2006: 222-231 | |
| c26 | Richard M. Yoo, Han Lee, Kingsum Chow, Hsien-Hsin S. Lee: Constructing a Non-Linear Model with Neural Networks for Workload Characterization. IISWC 2006: 150-159 | |
| c25 | Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmoy Ghosh: An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors. ISCA 2006: 102-113 | |
| c24 | Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee: A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design. MICRO 2006: 3-14 | |
| c23 | Weidong Shi, Hsien-Hsin S. Lee: Authentication Control Point and Its Implications For Secure Processor Design. MICRO 2006: 103-112 | |
| 2005 | ||
| j5 | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, Mrinmoy Ghosh: Towards the issues in architectural support for protection of software execution. SIGARCH Computer Architecture News 33(1): 6-15 (2005) | |
| c22 | Martin Schulz, Brian S. White, Sally A. McKee, Hsien-Hsin S. Lee, Jürgen Jeitner: Owl: next generation system monitoring. Conf. Computing Frontiers 2005: 116-124 | |
| c21 | Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee: Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs. DAC 2005: 553-558 | |
| c20 | Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee: Memory-Centric Security Architecture. HiPEAC 2005: 153-168 | |
| c19 | Weidong Shi, Hsien-Hsin S. Lee, Guofei Gu, Laura Falk, Trevor N. Mudge, Mrinmoy Ghosh: An Intrusion-Tolerant and Self-Recoverable Network Service System Using A Security Enhanced Chip Multiprocessor. ICAC 2005: 263-273 | |
| c18 | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu, Alexandra Boldyreva: High Efficiency Counter Mode Security Architecture via Prediction and Precomputation. ISCA 2005: 14-24 | |
| c17 | Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee: Wire-driven microarchitectural design space exploration. ISCAS (2) 2005: 1867-1870 | |
| c16 | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, Milos Prvulovic: Synonymous address compaction for energy reduction in data TLB. ISLPED 2005: 357-362 | |
| 2004 | ||
| j4 | Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough: Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1. IEEE Micro 24(4): 33-41 (2004) | |
| j3 | Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough: Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2. IEEE Micro 24(5): 70-78 (2004) | |
| c15 | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu: Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems. IEEE PACT 2004: 123-134 | |
| c14 | Mongkol Ekpanyapong, Pinar Korkmaz, Hsien-Hsin S. Lee: Choice Predictor for Free. Asia-Pacific Computer Systems Architecture Conference 2004: 399-413 | |
| c13 | Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, Santosh Pande: Hardware assisted control flow obfuscation for embedded processors. CASES 2004: 292-302 | |
| c12 | Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim: Profile-guided microarchitectural floorplanning for deep submicron processor design. DAC 2004: 634-639 | |
| c11 | Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee: Supporting Cache Coherence in Heterogeneous Multiprocessor Systems. DATE 2004: 1150-1157 | |
| c10 | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, Tao Zhang: Attacks and risk analysis for hardware supported software copy protection systems. Digital Rights Management Workshop 2004: 54-62 | |
| c9 | Mrinmoy Ghosh, Weidong Shi, Hsien-Hsin S. Lee: CoolPression - a hybrid significance compression technique for reducing energy in caches. SoCC 2004: 399-402 | |
| 2003 | ||
| j2 | Joshua B. Fryman, Chad Huneycutt, Hsien-Hsin S. Lee, Kenneth M. Mackenzie, David E. Schimmel: Energy-Efficient Network Memory for Ubiquitous Devices. IEEE Micro 23(5): 60-70 (2003) | |
| c8 | Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, Hsien-Hsin S. Lee: Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints. CGO 2003: 169-178 | |
| c7 | Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Hsien-Hsin S. Lee: Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level. ICCAD 2003: 693-700 | |
| c6 | Xiaotong Zhuang, Hsien-Hsin S. Lee: A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches. ICPP 2003: 286-293 | |
| c5 | Hsien-Hsin S. Lee, Chinnakrishnan S. Ballapuram: Energy efficient D-TLB and data cache using semantic-aware multilateral partitioning. ISLPED 2003: 306-311 | |
| 2001 | ||
| j1 | Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens: Improving Bandwidth Utilization using Eager Writeback. J. Instruction-Level Parallelism 3 (2001) | |
| c4 | Hsien-Hsin S. Lee, Mikhail Smelyanskiy, Chris J. Newburn, Gary S. Tyson: Stack Value File: Custom Microarchitecture for the Stack. HPCA 2001: 5-14 | |
| 2000 | ||
| c3 | Hsien-Hsin S. Lee, Gary S. Tyson: Region-based caching: an energy-delay efficient memory architecture for embedded processors. CASES 2000: 120-127 | |
| c2 | Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens: Eager writeback - a technique for improving bandwidth utilization. MICRO 2000: 11-21 | |
| 1994 | ||
| c1 | Eric L. Boyd, Waqar Azeem, Hsien-Hsin S. Lee, Tien-Pao Shih, Shih-Hao Hung, Edward S. Davidson: A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1. ICPP (3) 1994: 188-192 | |
Colors in the list of coauthors
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