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 | 2013 | |
|---|---|---|
| j29 |      | Chae-Eun Rhee, Hyuk-Jae Lee: Early Decision of Prediction Direction with Hierarchical Correlation for HEVC Compression. IEICE Transactions 96-D(4): 972-975 (2013) |
| 2012 | ||
| j28 | | Chae-Eun Rhee, Jin-Sung Kim, Hyuk-Jae Lee: Bitrate control using a heuristic spatial resolution adjustment for a real-time H.264/AVC encoder. EURASIP J. Adv. Sig. Proc. 2012: 87 (2012) |
| j27 | | Chae-Eun Rhee, Kyujoong Lee, Tae Sung Kim, Hyuk-Jae Lee: A survey of fast mode decision algorithms for inter-prediction and their applications to high efficiency video coding. IEEE Trans. Consumer Electronics 58(4): 1375-1383 (2012) |
| j26 | | Chae-Eun Rhee, Jin-Sung Kim, Hyuk-Jae Lee: Cascaded Direction Filtering for Fast Multidirectional Inter-Prediction in H.264/AVC Main and High Profile Compression. IEEE Trans. Circuits Syst. Video Techn. 22(3): 403-413 (2012) |
| j25 | | Yongseok Jin, Hyuk-Jae Lee: A Block-Based Pass-Parallel SPIHT Algorithm. IEEE Trans. Circuits Syst. Video Techn. 22(7): 1064-1075 (2012) |
| c27 | | Eung Sup Kim, Hyuk-Jae Lee: A practical hardware design for the keypoint detection in the SIFT algorithm with a reduced memory requirement. ISCAS 2012: 770-773 |
| c26 | | Juhyeon Hong, Eung Sup Kim, Hyuk-Jae Lee: Rotation-invariant hand posture classification with a convexity defect histogram. ISCAS 2012: 774-777 |
| 2011 | ||
| j24 | | Jaesun Kim, Younghoon Kim, Hyuk-Jae Lee: An H.264/AVC Decoder with Reduced External Memory Access for Motion Compensation. IEICE Transactions 94-D(4): 798-808 (2011) |
| j23 | | Kyujoong Lee, Jin-Sung Kim, Joohyuk Yum, Hyuk-Jae Lee: Block-based adaptive noise filtering for H.264/AVC compression. IEEE Trans. Consumer Electronics 57(3): 1390-1398 (2011) |
| j22 | | Kyujoong Lee, Chae-Eun Rhee, Hyuk-Jae Lee, Jung Won Kang: Memory and computation efficient hardware design for a 3 spatial and temporal layers SVC encoder. IEEE Trans. Consumer Electronics 57(4): 1921-1928 (2011) |
| j21 | | Jin-Su Jung, Young-Joon Jo, Hyuk-Jae Lee: A Fast H.264 Intra Frame Encoder with Serialized Execution of 4 × 4 and 16 × 16 Predictions and Early Termination. Signal Processing Systems 64(1): 161-175 (2011) |
| c25 | | Hyun Kim, Chae-Eun Rhee, Jin-Sung Kim, Sunwoong Kim, Hyuk-Jae Lee: Power-aware design with various low-power algorithms for an H.264/AVC encoder. ISCAS 2011: 571-574 |
| 2010 | ||
| j20 | | Dae-Hwan Kim, Hyuk-Jae Lee: Fine-Grain Register Allocation and Instruction Scheduling in a Reference Flow. Comput. J. 53(6): 717-740 (2010) |
| j19 | | Anil Çelebi, Hyuk-Jae Lee, Sarp Ertürk: Bit plane matching based variable block size motion estimation method and its hardware architecture. IEEE Trans. Consumer Electronics 56(3): 1625-1633 (2010) |
| j18 | | Chae-Eun Rhee, Jin-Su Jung, Hyuk-Jae Lee: A Real-Time H.264/AVC Encoder With Complexity-Aware Time Allocation. IEEE Trans. Circuits Syst. Video Techn. 20(12): 1848-1862 (2010) |
| 2009 | ||
| j17 | | Jaesung Lee, Hyuk-Jae Lee, Chanho Lee: A Phase-Based Approach for On-Chip Bus Architecture Optimization. Comput. J. 52(6): 626-645 (2009) |
| j16 | | Yongseok Jin, Yongje Lee, Hyuk-Jae Lee: A New Frame Memory Compression Algorithm with DPCM and VLC in a 4×4 Block. EURASIP J. Adv. Sig. Proc. 2009 (2009) |
| j15 | | Nam-Joon Kim, Sarp Ertürk, Hyuk-Jae Lee: Two-bit transform based block motion estimation using second derivatives. IEEE Trans. Consumer Electronics 55(2): 902-910 (2009) |
| j14 | | Jin-Sung Kim, Hyuk-Jae Lee: Error Propagation Algorithm for Reduction of Errors Due to Total Load and Line Load in a Plasma Panel Display. IEEE Trans. Circuits Syst. Video Techn. 19(4): 561-573 (2009) |
| j13 | | Jin-Sung Kim, Jae-Yeon Won, Hyuk-Jae Lee: An Adaptive Address Power Saving Method Based on the Prediction of Power Consumption in an AC PDP. IEEE Transactions on Industrial Electronics 56(12): 4939-4948 (2009) |
| c24 | | Eung Sup Kim, Seongyoon Kim, Gyoung-Hwan Hyun, Jin-Su Jung, Chae-Eun Rhee, Yongseok Jin, Hyuk-Jae Lee: An SoC Integrating an H.264 Encoder with an ISP. ISCAS 2009: 1936 |
| c23 | | Young-Joon Jo, Jin-Su Jung, Hyuk-Jae Lee: Fast pipeline schedule for an H.264 intra frame encoder with early termination. SiPS 2009: 109-114 |
| c22 | | |
| 2008 | ||
| j12 | | Jin-Su Jung, Genhua Jin, Hyuk-Jae Lee: Early Termination and Pipelining for Hardware Implementation of Fast H.264 Intraprediction Targeting Mobile HD Applications. EURASIP J. Adv. Sig. Proc. 2008 (2008) |
| j11 | | Nam-Joon Kim, Hyuk-Jae Lee, Jae-Beom Lee: Probabilistic Global Motion Estimation Based on Laplacian Two-Bit Plane Matching for Fast Digital Image Stabilization. EURASIP J. Adv. Sig. Proc. 2008 (2008) |
| j10 | | Sang-Heon Lee, Hyuk-Jae Lee: Motion-Compensated Frame Interpolation for Intra-Mode Blocks. IEICE Transactions 91-D(4): 1117-1126 (2008) |
| j9 | | Jaesung Lee, Hyuk-Jae Lee: Wire Optimization for Multimedia SoC and SiP Designs. IEEE Trans. on Circuits and Systems 55-I(8): 2202-2215 (2008) |
| j8 | | Jin-Sung Kim, Hyuk-Jae Lee: Reduction of halftoning errors due to line load in a plasma display panel. IEEE Trans. Consumer Electronics 54(4): 1522-1530 (2008) |
| j7 | | Jin-Sung Kim, Hyuk-Jae Lee: A Subfield Coding Algorithm for the Reduction of Gray Level Errors Due to Line Load in a Plasma Display Panel. IEEE Trans. Circuits Syst. Video Techn. 18(6): 827-839 (2008) |
| c21 | | Chae-Eun Rhee, Jin-Su Jung, Hyuk-Jae Lee: Speed control for a hardware based H.264/AVC encoder. SoCC 2008: 205-208 |
| 2007 | ||
| j6 | | Jaesung Lee, Hyuk-Jae Lee, Chanho Lee: A High-Speed Link Layer Architecture for Low Latency and Memory Cost Reduction. Comput. J. 50(5): 616-628 (2007) |
| c20 | | Sang-Heon Lee, Myungje Cho, Hyuk-Jae Lee: An Edge-Adaptive Block Matching Algorithm for Error Concealment. ICME 2007: 128-131 |
| c19 | | Nam-Joon Kim, Sarp Ertürk, Hyuk-Jae Lee: Two-Bit Transform Based Block Motion Estimation using Second Derivatives. ICME 2007: 1615-1618 |
| c18 | | Jisu Kim, Jonghwan Zhu, Hyuk-Jae Lee: Block-Level Processing of a Video Object Segmentation Algorithm for Real-Time Systems. ICME 2007: 2066-2069 |
| c17 | | Genhua Jin, Jin-Su Jung, Hyuk-Jae Lee: An Efficient Pipelined Architecture for H.264/AVC Intra Frame Processing. ISCAS 2007: 1605-1608 |
| c16 | | Yongje Lee, Chae-Eun Rhee, Hyuk-Jae Lee: A New Frame Recompression Algorithm Integrated with H.264 Video Compression. ISCAS 2007: 1621-1624 |
| c15 | | Jin-Sung Kim, Hyuk-Jae Lee: A PDP Sub-field Coding Algorithm for the Reduction of Errors due to Line Load Variation. ISCAS 2007: 3419-3422 |
| c14 | | Ju-Hyun Kim, Gyoung-Hwan Hyun, Hyuk-Jae Lee: Cache Organizations for H.264/AVC Motion Compensation. RTCSA 2007: 534-541 |
| 2006 | ||
| c13 | | Genhua Jin, Hyuk-Jae Lee: A Parallel and Pipelined Execution of H.264/AVC Intra Prediction. CIT 2006: 246 |
| c12 | | Jisu Kim, Hyuk-Jae Lee, Tae-Ho Lee, Myungje Cho, Jae-Beom Lee: Hardware/Software Partitioned Implementation of Real-time Object-oriented Camera for Arbitrary-shaped MPEG-4 Contents. ESTImedia 2006: 7-12 |
| c11 | | Dae-Hwan Kim, Hyuk-Jae Lee: Integrated Instruction Scheduling and Fine-Grain Register Allocation for Embedded Processors. SAMOS 2006: 269-278 |
| 2004 | ||
| c10 | | Sanghun Lee, Chanho Lee, Hyuk-Jae Lee: A new multi-channel on-chip-bus architecture for system-on-chips. SoCC 2004: 305-308 |
| 2003 | ||
| j5 | | Hyuk-Jae Lee, José A. B. Fortes: Generation of Injective and Reversible Modular Mappings. IEEE Trans. Parallel Distrib. Syst. 14(1): 1-12 (2003) |
| c9 | | Dae-Hwan Kim, Hyuk-Jae Lee: Register Allocation Based on a Reference Flow Analysis. APLAS 2003: 394-409 |
| c8 | | Dae-Hwan Kim, Hyuk-Jae Lee: Fine-Grain Register Allocation Based on a Global Spill Costs Analysis. SCOPES 2003: 255-269 |
| 2002 | ||
| c7 | | Dae-Hwan Kim, Hyuk-Jae Lee: Iterative procedural abstraction for code size reduction. CASES 2002: 277-279 |
| 2001 | ||
| j4 | | Yukong Zhang, Young-Jun Kwon, Hyuk-Jae Lee: A Systematic Generation of Initial Register-Reuse Chains for Dependence Minimization. SIGPLAN Notices 36(2): 47-54 (2001) |
| 1998 | ||
| j3 | | Hyuk-Jae Lee, José A. B. Fortes: Automatic Generation of Modular Time-Space Mappings and Data Alignments. VLSI Signal Processing 19(2): 195-208 (1998) |
| 1997 | ||
| j2 | | Hyuk-Jae Lee, José A. B. Fortes: Communication-Minimal Partitioning and Data Alignment for Affine Nested Loops. Comput. J. 40(6): 302-310 (1997) |
| j1 | | Hyuk-Jae Lee, José A. B. Fortes: Modular Mappings and Data Distribution Independent Computations. Parallel Processing Letters 7(2): 169-180 (1997) |
| c6 | | Hyuk-Jae Lee, José A. B. Fortes: Automatic generation of injective modular mappings. ICPP 1997: 417- |
| c5 | | Hyuk-Jae Lee, James P. Robertson, José A. B. Fortes: Generalized Cannon's Algorithm for Parallel Matrix Multiplication. International Conference on Supercomputing 1997: 44-51 |
| 1996 | ||
| c4 | | |
| 1995 | ||
| c3 | | Hyuk-Jae Lee, José A. B. Fortes: Data Alignments for Modular Time-Space Mappings of BLAS-like Algorithms. ASAP 1995: 34- |
| c2 |  | Hyuk-Jae Lee, José A. B. Fortes: Conditions of Blocked BLAS-like Algorithms for Data Alignment and Communication Minimization. ICPP (3) 1995: 220-223 |
| c1 | | Hyuk-Jae Lee, José A. B. Fortes: Toward data distribution independent parallel matrix multiplication. IPPS 1995: 436-440 |
Colors in the list of coauthors
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