| 2013 | ||
|---|---|---|
| c15 | Hasan Baig, Jeong-A. Lee: A novel run-time auto-reconfigurable FPGA architecture for fast fault recovery with backward compatibility (abstract only). FPGA 2013: 270 | |
| 2012 | ||
| c14 | Hasan Baig, Jeong-A. Lee: An island-style-routing compatible fault-tolerant FPGA architecture with self-repairing capabilities. FPT 2012: 301-304 | |
| 2010 | ||
| c13 | Young Jin Park, Min Zeng, Byeong-Seok Lee, Jeong-A. Lee, Seung Gu Kang, Cheol Hong Kim: Thermal Analysis for 3D Multi-core Processors with Dynamic Frequency Scaling. ACIS-ICIS 2010: 69-74 | |
| 2009 | ||
| j8 | Sanghoon Kwak, Jeong-Gun Lee, Eun-Gu Jung, Dongsoo Har, Milos D. Ercegovac, Jeong-A. Lee: Exploration of Power-Delay Trade-Offs with Heterogeneous Adders by Integer Linear Programming. Journal of Circuits, Systems, and Computers 18(4): 787-800 (2009) | |
| 2007 | ||
| j7 | Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions. VLSI Signal Processing 46(2-3): 133-151 (2007) | |
| c12 | Jeong-Gun Lee, Jeong-A. Lee, Byeong-Seok Lee, Milos D. Ercegovac: A Design Method for Heterogeneous Adders. ICESS 2007: 121-132 | |
| e2 | Sio Iong Ao, Oscar Castillo, Craig Douglas, David Dagan Feng, Jeong-A. Lee (Eds.): Proceedings of the International MultiConference of Engineers and Computer Scientists 2007, IMECS 2007, March 21-23, 2007, Hong Kong, China. Lecture Notes in Engineering and Computer Science, Newswood Limited 2007, isbn 978-988-98671-4-0 | |
| 2006 | ||
| e1 | Sio Iong Ao, Jeong-A. Lee, Oscar Castillo, Pranay Chaudhuri, David Dagan Feng (Eds.): Proceedings of the International MultiConference of Engineers and Computer Scientists 2006, IMECS '06, June 20-22, 2006, Hong Kong, China. Lecture Notes in Engineering and Computer Science, Newswood Limited 2006, isbn 988-98671-3-3 | |
| 2005 | ||
| j6 | Jeong-Gun Lee, Suk-Jin Kim, Jeong-A. Lee, Kiseon Kim: A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme. IEICE Transactions 88-A(4): 1031-1037 (2005) | |
| j5 | Jeong-Gun Lee, Jeong-A. Lee, Suk-Jin Kim, Kiseon Kim: Design of a Mutated Adder and Its Optimization Using ILP Formulation. IEICE Transactions 88-D(7): 1506-1508 (2005) | |
| j4 | Eun-Gu Jung, Jeong-Gun Lee, Sanghoon Kwak, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion. IEICE Transactions 88-C(12): 2395-2399 (2005) | |
| c11 | Eun-Gu Jung, Jeong-Gun Lee, Sanghoon Kwak, Kyoung-Sun Jhang, Jeong-A. Lee, Dong-Soo Har: High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion. ACM Great Lakes Symposium on VLSI 2005: 152-155 | |
| c10 | Eun-Gu Jung, Eonpyo Hong, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Self-timed Interconnect with Layered Interface Based on Distributed and Modularized Control for Multimedia SoCs. PCM (1) 2005: 500-511 | |
| 2004 | ||
| c9 | Seong-Yong Ahn, Jun-Yong Kim, Jeong-A. Lee: Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System. Asia-Pacific Computer Systems Architecture Conference 2004: 102-114 | |
| c8 | Byung-Soo Choi, Jeong-A. Lee, Dong-Soo Har: High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption. Asia-Pacific Computer Systems Architecture Conference 2004: 170-184 | |
| c7 | Jeong-Gun Lee, Euiseok Kim, Jeong-A. Lee, Eunok Paek: Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. Asia-Pacific Computer Systems Architecture Conference 2004: 582-595 | |
| c6 | Dong-Hoon Yoo, Dong-Ik Lee, Jeong-A. Lee: Operation Net System: A Formal Design Representation Model for High-Level Synthesis of Asynchronous Systems Based on Transformations. ICATPN 2004: 435-453 | |
| 2003 | ||
| c5 | Seong-Yong Ahn, Yo-Seop Hwang, Jae-Hong Shim, Jeong-A. Lee: Producer and Consumer: Roles of a Microprocessor and a Configurable Logic in a Configurable SoC. Engineering of Reconfigurable Systems and Algorithms 2003: 325- | |
| c4 | Sangman Moh, Jae-Hong Shim, Yang-Dong Lee, Jeong-A. Lee, Beom-Joon Cho: Design and Evaluation of a Cache Coherence Adapter for the SMP Nodes Interconnected via Xcent-Net. ISCIS 2003: 908-915 | |
| 2000 | ||
| j3 | Gerben J. Hekstra, Ed F. Deprettere, Jeong-A. Lee: Guest Editor's Introduction. VLSI Signal Processing 25(2): 99-100 (2000) | |
| j2 | Kees-Jan Van der Kolk, Jeong-A. Lee, Ed F. Deprettere: A Floating Point Vectoring Algorithm Based on Fast Rotations. VLSI Signal Processing 25(2): 125-139 (2000) | |
| 1999 | ||
| c3 | Kees-Jan Van der Kolk, Ed F. Deprettere, Jeong-A. Lee: A Floating Point Vectoring Algorithm Based on Fast Rotations. EUROMICRO 1999: 1140- | |
| 1992 | ||
| j1 | Jeong-A. Lee, Tomás Lang: Constant-Factor Redundant CORDIC for Angle Calculation and Rotation. IEEE Trans. Computers 41(8): 1016-1025 (1992) | |
| 1991 | ||
| c2 | Jeong-A. Lee, Tomás Lang: SVD by constant-factor-redundant-CORDIC. IEEE Symposium on Computer Arithmetic 1991: 264-271 | |
| c1 | John A. Harding, Tomás Lang, Jeong-A. Lee: A Comparison of Redundant CORDIC Rotation Engines. ICCD 1991: 556-559 | |
Colors in the list of coauthors
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